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Integrated Circuits for Analog and RF µ-Systems
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2025
E. Baiesi Fietta
,
Seebacher, D.
,
Ponton, D.
, and
Bevilacqua, A.
,
“
A 0.7 V Multi-Class Digital Doherty Power Amplifier for BLE Applications With 41% Peak DE in 22 nm CMOS
”
,
IEEE Solid-State Circuits Letters
, vol. 8, pp. 217 - 220, 2025.
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L. Navarin
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A DLL-Based FSK Demodulator for Asynchronous Communications
”
, in
2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)
, 2025.
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2015
A. Celin
and
Gerosa, A.
,
“
Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs
”
, in
2015 IEEE International Symposium on Circuits and Systems (ISCAS)
, 2015, pp. 1454-1457.
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Recent Publications
A Highly Integrated Dual-Path Step-Down Hybrid DC–DC Converter With Self-Balanced Flying Capacitor and Reduced Inductor Current
A 5.1–10.5 GHz SiGe BiCMOS Power Amplifier for 6GNR with 29 dBm PSAT and 40.1% PAE
Analysis of Hybrid Dual-Path Step-Down Topology for High-Frequency, Integrated Dc-Dc Converters
A 0.7 V Multi-Class Digital Doherty Power Amplifier for BLE Applications With 41% Peak DE in 22 nm CMOS
Analysis and Design of a SiGe BiCMOS PA for 6G FR3 Band With 29-dBm P SAT and 40.1% PAE
More...