Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs

TitleOptimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs
Publication TypeConference Paper
Year of Publication2015
AuthorsCelin, A., and A. Gerosa
Conference Name2015 IEEE International Symposium on Circuits and Systems (ISCAS)
Date PublishedMay
KeywordsAlgorithm design and analysis, analog-to-digital converter, Clocks, CMOS digital integrated circuits, CMOS integrated circuits, CMOS technologies, CMOS technology, data weighted averaging, DEM algorithms, dynamic element matching algorithms, hardware complexity, Heuristic algorithms, internal DAC, logic design, mismatch cancellation, Modulation, multibit sigma-delta ADC, multibit ΣΔ ADC, Noise, optimal DWA design, sigma-delta modulation, sigma-delta modulator, size 65 nm, Timing, ΣΔ modulator
DOI10.1109/ISCAS.2015.7168918