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Biblio

Export 141 results:
Author Title Type [ Year(Asc)]
2019
A. Gatti, Spiazzi, G., Gerosa, A., Neviani, A., and Bevilacqua, A., A 130-nm CMOS Dual Input-Polarity DC–DC Converter for Low-Power Applications, IEEE Solid-State Circuits Letters, vol. 2, pp. 211-214, 2019.
F. Quadrelli, Panazzolo, F., Tiebout, M., Padovan, F., Bassi, M., and Bevilacqua, A., A 18.2-29.3 GHz Colpitts VCOs bank with -119.5 dBc/Hz Phase Noise at 1 MHz Offset for 5G Communications, in 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2019.
A. Franceschin, Andreani, P., Padovan, F., Bassi, M., Nonis, R., and Bevilacqua, A., A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion, in ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), 2019.
M. Bassi, Boi, G., Padovan, F., Fritzin, J., Di Martino, S., Knauder, D., and Bevilacqua, A., A 39-GHz Frequency Tripler With >40-dBc Harmonic Rejection for 5G Communication Systems in 28-nm Bulk CMOS, IEEE Solid-State Circuits Letters, vol. 2, pp. 107-110, 2019.
A. Bilato, Issakov, V., and Bevilacqua, A., Considerations on 120GHz LO Signal Generation and Distribution for Highly-Integrated Multi-Channel Radar Transceivers, in 2019 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS), 2019.
A. Gerosa, Bevilacqua, A., and Spiazzi, G., A Multi-Phase Self-Reconfigurable Switched-Capacitor DC-DC Step-Up Converter Integrated in CMOS Technology, in 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019.
G. Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., Non-isolated High Step-up DC-DC Converter with Minimum Switch Voltage Stress, IEEE Transactions on Power Electronics, vol. 34, no. 2, pp. 1470-1480, 2019.
D. Oloumi, Bevilacqua, A., and Bassi, M., UWB Radar for High Resolution Breast Cancer Scanning: System, Architectures, and Challenges, in 2019 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS), 2019.
2018
A. Passamani, Ponton, D., Wolter, A., Knoblinger, G., and Bevilacqua, A., A 28nm Low-Voltage Digital Power-Amplifier for QAM-256 WIFI Applications in 0.5mm2 Area w/ 2D Digital-Pre-Distortion and Package Combiner, in 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2018.
P. Scaramuzza, Rubino, C., Caruso, M., Tiebout, M., Bevilacqua, A., and Neviani, A., Class-J SiGe X-Band Power Amplifier Using a Ladder Filter-Based AM-PM Distortion Reduction Technique, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 11, pp. 3780 - 3789, 2018.
A. Franceschin, Padovan, F., Nonis, R., and Bevilacqua, A., On the Optimal Operation Frequency to Minimize Phase Noise in Integrated Harmonic Oscillators, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 5, pp. 657 - 661, 2018.
F. Padovan, Quadrelli, F., Bassi, M., Tiebout, M., and Bevilacqua, A., A quad-core 15GHz BiCMOS VCO with -124dBc/Hz phase noise at 1MHz offset, -189dBc/Hz FOM, and robust to multimode concurrent oscillations, in 2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018.
F. Pepe, Bevilacqua, A., and Andreani, P., On the Remarkable Performance of the Series-Resonance CMOS Oscillator, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, pp. 531-542, 2018.
A. Mazzanti and Bevilacqua, A., Second-Order Equivalent Circuits for the Design of Doubly-Tuned Transformer Matching Networks, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 12, pp. 4157 - 4168, 2018.

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