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Integrated Circuits for Analog and RF µ-Systems
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Neviani, A.
and
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BiCMOS integrated circuits
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2017
F. Boscolo
,
Padovan, F.
,
Quadrelli, F.
,
Tiebout, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 21GHz 20.5%-tuning range Colpitts VCO with -119 dBc/Hz phase noise at 1MHz offset
”
, in
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
, 2017, pp. 91-94.
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2016
F. Padovan
,
Tiebout, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 15.5-39GHz BiCMOS VGA with phase shift compensation for 5G mobile communication transceivers
”
, in
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference
, 2016, pp. 363-366.
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2015
F. Padovan
,
Tiebout, M.
,
Dielacher, F.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
SiGe BiCMOS VCO with 27% tuning range for 5G communications
”
, in
2015 Asia-Pacific Microwave Conference (APMC)
, 2015, vol. 1, pp. 1-3.
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2007
A. Bevilacqua
,
Maniero, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
An Integrated Solution for Suppressing WLAN Signals in UWB Receivers
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 54, pp. 1617 -1625, 2007.
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2006
A. Bevilacqua
,
Maniero, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.35 um SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection
”
, in
13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06.
, 2006, pp. 1015 -1018.
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Recent Publications
A Highly Integrated Dual-Path Step-Down Hybrid DC–DC Converter With Self-Balanced Flying Capacitor and Reduced Inductor Current
On the Upconversion of the Cross-Coupled Pair 1/f Noise Into Phase Noise in Current-Biased Class-B CMOS Oscillators
A 5.1–10.5 GHz SiGe BiCMOS Power Amplifier for 6GNR with 29 dBm PSAT and 40.1% PAE
Analysis of Hybrid Dual-Path Step-Down Topology for High-Frequency, Integrated Dc-Dc Converters
A 0.7 V Multi-Class Digital Doherty Power Amplifier for BLE Applications With 41% Peak DE in 22 nm CMOS
More...