| Title | A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner |
| Publication Type | Journal Article |
| Year of Publication | 2023 |
| Authors | Buccoleri, F, Dartizio, SM, Tesolin, F, Avallone, L, Santiccioli, A, Iesurum, A, Steffan, G, Cherniak, D, Bertulessi, L, Bevilacqua, A, Samori, C, Lacaita, AL, Levantino, S |
| Journal | IEEE Journal of Solid-State Circuits |
| Volume | 58 |
| Pagination | 634-646 |
| DOI | 10.1109/JSSC.2022.3228899 |