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] Filters: Keyword is phase locked loops [Clear All Filters]
, “Quadrature VCOs Based on Coupled PLLs”, in IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007, 2007, pp. 2140 -2143.
, “A 2-16 GHz 65 nm CMOS Stepped-Frequency Radar Transmitter With Harmonic Rejection for High-Resolution Medical Imaging Applications”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 413-422, 2015.
, “Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs”, IEEE Journal of Solid-State Circuits, vol. 59, pp. 294-306, 2024.
, “A DLL-Based FSK Demodulator for Asynchronous Communications”, in 2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), 2025.