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Integrated Circuits for Analog and RF µ-Systems
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2024
N. Zugno
and
Bevilacqua, A.
,
“
Analysis of a Split-Constant-Slope Digital-to-Time Converter Topology
”
, in
2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)
, 2024.
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2017
D. Vogrig
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A Symbol-Duty-Cycled 440-pJ/b Impulse Radio Receiver With 0.57-aJ Sensitivity in 130-nm CMOS
”
,
IEEE Transactions on Microwave Theory and Techniques
, vol. 65, pp. 565-573, 2017.
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2015
D. Vogrig
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A symbol-duty-cycled 440 pJ/b impulse radio receiver with 0.57 aJ sensitivity in 130 nm CMOS
”
, in
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
, 2015, pp. 243-246.
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Recent Publications
A Highly Integrated Dual-Path Step-Down Hybrid DC–DC Converter With Self-Balanced Flying Capacitor and Reduced Inductor Current
A Fully-Integrated Galvanic Isolator for Gate Drivers With Asynchronous 100/167 Mb/s ASK/FSK Full-Duplex Communication
Analysis of a Three-Way Voltage-Mode Digital Doherty Power Amplifier for Bluetooth Applications
A DLL-Based FSK Demodulator for Asynchronous Communications
Analysis of a gm-C Complex Filter for Low Power Wireless Receivers
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