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Filters: Author is Vogrig, D. and Keyword is iterative decoding [Clear All Filters]

2006

A. Graell i Amat, Vogrig, D., Benedetto, S., Montorsi, G., Neviani, A., and Gerosa, A., “CTH08-3: Reconfigurable Analog Decoder for a Serially Concatenated Convolutional Code”, in Global Telecommunications Conference, 2006. GLOBECOM '06. IEEE, 2006, pp. 1 -6.

2005

D. Vogrig, Gerosa, A., Neviani, A., Amat, A. G., Montorsi, G., and Benedetto, S., “A 0.35- mu;m CMOS analog turbo decoder for the 40-bit rate 1/3 UMTS channel code”, Solid-State Circuits, IEEE Journal of, vol. 40, pp. 753 - 762, 2005.

A. G. I. Amatt, Benedetto, S., Montorsi, G., Vogrig, D., Neviani, A., and Gerosa, A., “An analog turbo decoder for the rate-1/3, 40 bit, UMTS turbo code”, in Communications, 2005. ICC 2005. 2005 IEEE International Conference on, 2005, vol. 1, pp. 663 - 667 Vol. 1.