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Integrated Circuits for Analog and RF µ-Systems
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Gerosa, A.
and
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low noise amplifiers
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2010
S. Soldà
,
Caruso, M.
,
Bevilacqua, A.
,
Gerosa, A.
,
Vogrig, D.
, and
Neviani, A.
,
“
A 5Mb/s UWB-IR CMOS transceiver with a 186 pJ/b and 150 pJ/b TX/RX energy request
”
, in
Proceedings of the ESSCIRC 2010
, 2010, pp. 498 -501.
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2009
A. Vallese
,
Bevilacqua, A.
,
Sandner, C.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems
”
,
IEEE Journal of Solid-State Circuits
, vol. 44, pp. 331 -343, 2009.
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2008
A. Bevilacqua
,
Sandner, C.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 6-9-GHz programmable gain LNA with integrated balun in 90-nm CMOS
”
, in
IEEE International Conference on Ultra-Wideband, 2008. ICUWB 2008.
, 2008, vol. 1, pp. 25 -28.
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A. Bevilacqua
,
Camponeschi, M.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
Design of broadband inductorless LNAs in ultra-scaled CMOS technologies
”
, in
IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008.
, 2008, pp. 1300 -1303.
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2007
A. Bevilacqua
,
Vallese, A.
,
Sandner, C.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.13 um CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers
”
, in
Digest of Technical Papers of 2007 IEEE International Solid-State Circuits Conference
, 2007, pp. 420 -612.
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2006
A. Bevilacqua
,
Maniero, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.35 um SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection
”
, in
13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06.
, 2006, pp. 1015 -1018.
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A. Bevilacqua
,
Sandner, C.
,
Gerosa, A.
, and
Neviani, A.
,
“
A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers
”
,
IEEE Microwave and Wireless Components Letters
, vol. 16, pp. 134 -136, 2006.
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Recent Publications
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A 0.7 V Multi-Class Digital Doherty Power Amplifier for BLE Applications With 41% Peak DE in 22 nm CMOS
Analysis and Design of a SiGe BiCMOS PA for 6G FR3 Band With 29-dBm P SAT and 40.1% PAE
A Driving Methodology for Four-Quadrant Power Switches Using CMOS Transistor Stacking
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