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Integrated Circuits for Analog and RF µ-Systems
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2024
A. Iesurum
,
Manente, D.
,
Padovan, F.
,
Bassi, M.
, and
Bevilacqua, A.
,
“
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs
”
,
IEEE Journal of Solid-State Circuits
, vol. 59, pp. 294-306, 2024.
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L. Tomasin
,
Vogrig, D.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
Analysis and Design of Reactive Passive Mixers for High-Order Modulation IoT Cartesian Transmitters
”
,
IEEE Transactions on Microwave Theory and Techniques
, vol. 72, pp. 2840-2851, 2024.
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2017
D. Vogrig
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A Symbol-Duty-Cycled 440-pJ/b Impulse Radio Receiver With 0.57-aJ Sensitivity in 130-nm CMOS
”
,
IEEE Transactions on Microwave Theory and Techniques
, vol. 65, pp. 565-573, 2017.
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2015
D. Vogrig
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A symbol-duty-cycled 440 pJ/b impulse radio receiver with 0.57 aJ sensitivity in 130 nm CMOS
”
, in
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
, 2015, pp. 243-246.
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Recent Publications
A Highly Integrated Dual-Path Step-Down Hybrid DC–DC Converter With Self-Balanced Flying Capacitor and Reduced Inductor Current
On the Upconversion of the Cross-Coupled Pair 1/f Noise Into Phase Noise in Current-Biased Class-B CMOS Oscillators
Analysis and Design of a SiGe BiCMOS PA for 6G FR3 Band With 29-dBm P SAT and 40.1% PAE
A Driving Methodology for Four-Quadrant Power Switches Using CMOS Transistor Stacking
A 5.75mW Fully-Integrated Galvanic Isolator for Gate Drivers with Asynchronous 66.7/66.7 Mb/s Full-Duplex Communication
More...