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Integrated Circuits for Analog and RF µ-Systems
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2025
L. Guglielmini
and
Bevilacqua, A.
,
“
Analysis of a gm-C Complex Filter for Low Power Wireless Receivers
”
, in
2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME)
, 2025.
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D. Frassetto
,
Cabizza, S.
,
Agostinelli, M.
,
Garbossa, C.
,
Spiazzi, G.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
Analysis of Hybrid Dual-Path Step-Down Topology for High-Frequency, Integrated Dc-Dc Converters
”
, in
2025 International Conference on IC Design and Technology (ICICDT)
, 2025.
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E. Baiesi Fietta
,
Seebacher, D.
,
Ponton, D.
, and
Bevilacqua, A.
,
“
Efficiency Optimization of Voltage-Mode CMOS Digital Doherty Power Amplifiers
”
,
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
, pp. 1-9, 2025.
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A. Bevilacqua
and
Mazzanti, A.
,
“
On the Upconversion of the Cross-Coupled Pair 1/f Noise Into Phase Noise in Current-Biased Class-B CMOS Oscillators
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, pp. 1-10, 2025.
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2024
A. Bevilacqua
and
Mazzanti, A.
,
“
Analysis of CMRR in Doubly-Tuned Transformer Baluns
”
,
IEEE Transactions on Circuits and Systems II: Express Briefs
, vol. 71, pp. 4874-4878, 2024.
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2015
A. Passamani
,
Ponton, D.
,
Knoblinger, G.
, and
Bevilacqua, A.
,
“
Analysis and design of a 1.1dB-IL third-order Matching Network for Switched-Capacitor PAs
”
, in
Nordic Circuits and Systems Conference (NORCAS): NORCHIP International Symposium on System-on-Chip (SoC), 2015
, 2015, pp. 1-4.
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2014
A. Passamani
,
Ponton, D.
,
Knoblinger, G.
, and
Bevilacqua, A.
,
“
A linear model of efficiency for Switched-Capacitor RF Power-Amplifiers
”
, in
2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
, 2014, pp. 1-4.
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Recent Publications
A Highly Integrated Dual-Path Step-Down Hybrid DC–DC Converter With Self-Balanced Flying Capacitor and Reduced Inductor Current
A Driving Methodology for Four-Quadrant Power Switches Using CMOS Transistor Stacking
A 5.75mW Fully-Integrated Galvanic Isolator for Gate Drivers with Asynchronous 66.7/66.7 Mb/s Full-Duplex Communication
On the Upconversion of the Cross-Coupled Pair 1/f Noise Into Phase Noise in Current-Biased Class-B CMOS Oscillators
A Fully-Integrated Galvanic Isolator for Gate Drivers With Asynchronous 100/167 Mb/s ASK/FSK Full-Duplex Communication
More...