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Filters: Author is Frassetto, Domenico  [Clear All Filters]
2026
D. Frassetto, Cabizza, S., Zilio, N. ', Karim, A., Garbossa, C., Agostinelli, M., Spiazzi, G., Bevilacqua, A., and Neviani, A., “A Highly Integrated Dual-Path Step-Down Hybrid DC–DC Converter With Self-Balanced Flying Capacitor and Reduced Inductor Current”, IEEE Open Journal of Power Electronics, vol. 7, pp. 167-179, 2026.
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2025
D. Frassetto, Cabizza, S., Karim, A., Spiazzi, G., Bevilacqua, A., and Neviani, A., “Accurate Analysis of Switching Transients in the High-Frequency, Integrated Dual-Path Step-Down DC-DC Converter”, in 2025 IEEE Nordic Circuits and Systems Conference (NorCAS), 2025.
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D. Frassetto, Cabizza, S., Agostinelli, M., Garbossa, C., Spiazzi, G., Bevilacqua, A., and Neviani, A., “Analysis of Hybrid Dual-Path Step-Down Topology for High-Frequency, Integrated Dc-Dc Converters”, in 2025 International Conference on IC Design and Technology (ICICDT), 2025.
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ICARUS - Integrated Circuits for Analog and RF µ-Systems

Dipartimento di Ingegneria dell’Informazione , Via Gradenigo 6/B, 35131 Padova, Italy

University of Padova

Phone: +39 049 827 7794

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Recent Publications

  • A Highly Integrated Dual-Path Step-Down Hybrid DC–DC Converter With Self-Balanced Flying Capacitor and Reduced Inductor Current
  • A 0.13-μm HV CMOS Fully-Integrated Galvanic Isolator for Gate Drivers With Asynchronous Full-Duplex Communication
  • Accurate Analysis of Switching Transients in the High-Frequency, Integrated Dual-Path Step-Down DC-DC Converter
  • A 5-7 GHz BiCMOS Front-End Module for WiFi 6e with 2.2 dB NF and 16 dBm PAVG at −40 dB EVM
  • Efficiency Optimization of Voltage-Mode CMOS Digital Doherty Power Amplifiers
More...