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TypeTitleAuthorRepliesLast updated
BiblioAnalysis of CMRR in Doubly-Tuned Transformer Baluns %101 week 1 day ago
BiblioOn the Efficiency Enhancement of Voltage Mode Digital Doherty Power Amplifiers %101 week 6 days ago
BiblioOn the Optimal Design of Integrated AC-DC Converters for Energy Harvesting %101 week 6 days ago
BiblioA Stacking Technique for High-Swing Low-Phase Noise Class-C Oscillators Using Core Devices in Ultrascaled CMOS Technologies %101 month 5 days ago
BiblioA 48-58GHz Frac-N DPLL achieving 137fs integrated jitter and fast locking time below 1μs %101 month 1 week ago
BiblioOn the Benefits of the Common-Mode Resonance on the 1/f ² Phase Noise Sideband %101 month 4 weeks ago
BiblioAnalysis of a Split-Constant-Slope Digital-to-Time Converter Topology %105 months 1 week ago
BiblioOn the Efficiency of Output-Matched Radiofrequency Power Amplifiers %105 months 1 week ago
BiblioAnalysis and Design of Reactive Passive Mixers for High-Order Modulation IoT Cartesian Transmitters %107 months 21 hours ago
BiblioAnalysis and Design of Coupled PLL-Based CMOS Quadrature VCOs %1010 months 1 week ago
BiblioA Reactive Passive Mixer for 16-QAM Cartesian IoT Transmitters in 22 nm FD-SOI CMOS %101 year 3 months ago
BiblioA Time-Variant Analysis of Passive Resistive Mixers Using Thevenin Theorem %101 year 5 months ago
BiblioOn the Design Challenges of Class-C Oscillators in Ultra-Scaled CMOS Technologies %101 year 5 months ago
BiblioA 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner %101 year 9 months ago
BiblioA Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures %101 year 10 months ago
BiblioA 24 GHz Quadrature VCO Based on Coupled PLL with -134 dBc/Hz Phase Noise at 10 MHz Offset in 28 nm CMOS %102 years 1 month ago
BiblioGalvanic-Coupled Trans-Dural Data Transfer for High-Bandwidth Intracortical Neural Sensing %102 years 2 months ago
BiblioA Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μ s-Locking-Time %102 years 2 months ago
BiblioDesign implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC %102 years 3 months ago
BiblioGaN RF HEMT Reliability: Impact of Device Processing on I-V Curve Stability and Current Collapse %102 years 3 months ago
BiblioAnalysis and Design of a Fully-Integrated Pulsed LiDAR Driver in 100V-GaN IC Technology %102 years 3 months ago
BiblioA 13.56 MHz Reconfigurable Step-Up Switched Capacitor Converter for Wireless Power Transfer System in Implantable Medical Devices %102 years 3 months ago
BiblioDemonstration of UV-Induced Threshold Voltage Instabilities in Vertical GaN Nanowire Array-Based Transistors %102 years 3 months ago
BiblioA 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise %102 years 3 months ago
BiblioCompact Modeling of Nonideal Trapping/Detrapping Processes in GaN Power Devices %102 years 5 months ago

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