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A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior

TitleA reduced hardware complexity data-weighted averaging algorithm with no tonal behavior
Publication TypeConference Paper
Year of Publication2016
AuthorsCelin, A, Gerosa, A
Conference Name2016 IEEE International Symposium on Circuits and Systems (ISCAS)
Date PublishedMay
Keywordsalgorithm ciclicity, Algorithm design and analysis, bidirectional data-weighted averaging algorithm, CMOS digital integrated circuits, CMOS technology, Complexity theory, DAC, device mismatch, digital to analog converters, digital-analogue conversion, Hardware, hardware complexity, integrated circuit modelling, Mathematical model, Modulation, Multiplexing, sigma-delta modulation, sigma-delta modulators, size 65 nm, spurs immunity, Standards
DOI10.1109/ISCAS.2016.7527337
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