A. Gerosa, Xotta, A., Bevilacqua, A., and Neviani, A.,
“An A/D Converter for Multimode Wireless Receivers, Based on the Cascade of a Double-Sampling Σ Δ Modulator and a Flash Converter”,
IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 53, pp. 2109 -2124, 2006.
A. Xotta, Vogrig, D., Gerosa, A., Neviani, A., Graell i Amat, A., Montorsi, G., Bruccoleri, M., and Betti, G.,
“An all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels”, in
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on, 2002, vol. 5, p. V-69 - V-72 vol.5.
A. G. I. Amatt, Benedetto, S., Montorsi, G., Vogrig, D., Neviani, A., and Gerosa, A.,
“An analog turbo decoder for the rate-1/3, 40 bit, UMTS turbo code”, in
Communications, 2005. ICC 2005. 2005 IEEE International Conference on, 2005, vol. 1, pp. 663 - 667 Vol. 1.
S. Veni, Andreani, P., Caruso, M., Tiebout, M., and Bevilacqua, A.,
“Analysis and Design of a 17-GHz All-npn Push-Pull Class-C VCO”,
IEEE Journal of Solid-State Circuits, vol. 55, pp. 2345-2355, 2020.
A. Vallese, Bevilacqua, A., Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A.,
“Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems”,
IEEE Journal of Solid-State Circuits, vol. 44, pp. 331 -343, 2009.
A. Iesurum, Manente, D., Padovan, F., Bassi, M., and Bevilacqua, A.,
“Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs”,
IEEE Journal of Solid-State Circuits, vol. 59, pp. 294-306, 2024.
A. Passamani, Ponton, D., Knoblinger, G., and Bevilacqua, A.,
“Analysis and design of power and efficiency in third-order matching networks for switched-capacitor power-amplifiers”,
Analog Integrated Circuits and Signal Processing, vol. 89, no. 2, pp. 307-315, 2016.