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2024

A. Iesurum, Manente, D., Padovan, F., Bassi, M., and Bevilacqua, A., “Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs”, IEEE Journal of Solid-State Circuits, vol. 59, pp. 294-306, 2024.

L. Tomasin, Vogrig, D., Neviani, A., and Bevilacqua, A., “Analysis and Design of Reactive Passive Mixers for High-Order Modulation IoT Cartesian Transmitters”, IEEE Transactions on Microwave Theory and Techniques, vol. 72, pp. 2840-2851, 2024.

N. Zugno and Bevilacqua, A., “Analysis of a Split-Constant-Slope Digital-to-Time Converter Topology”, in 2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2024.

L. Bellemo and Bevilacqua, A., “On the Benefits of the Common-Mode Resonance On the 1/f2 Phase Noise Sideband”, IEEE Transactions on Circuits and Systems II: Express Briefs, pp. 1-1, 2024.

D. Pecile, Kokorovic, S., Gambarucci, A., and Bevilacqua, A., “On the Efficiency of Output-Matched Radiofrequency Power Amplifiers”, in 2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2024.

L. Tomasin, Iesurum, A., Gobbo, A., Neviani, A., and Bevilacqua, A., “A Stacking Technique for High-Swing Low-Phase Noise Class-C Oscillators Using Core Devices in Ultrascaled CMOS Technologies”, IEEE Transactions on Circuits and Systems II: Express Briefs, pp. 1-1, 2024.

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