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S
S. Soldà, Caruso, M., Bevilacqua, A., Gerosa, A., Vogrig, D., and Neviani, A., A 5Mb/s UWB-IR CMOS transceiver with a 186 pJ/b and 150 pJ/b TX/RX energy request, in Proceedings of the ESSCIRC 2010, 2010, pp. 498 -501.
S. Soldà, Vogrig, D., Bevilacqua, A., Gerosa, A., and Neviani, A., Analog decoding of trellis coded modulation for multi-level flash memories, in IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008., 2008, pp. 744 -747.
S. Soldà, Caruso, M., Bevilacqua, A., Gerosa, A., Vogrig, D., and Neviani, A., A 5 Mb/s UWB-IR Transceiver Front-End for Wireless Sensor Networks in 0.13um CMOS, IEEE Journal of Solid-State Circuits, vol. 46, pp. 1636 -1647, 2011.
G. Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., Non-isolated High Step-up DC-DC Converter with Minimum Switch Voltage Stress, IEEE Transactions on Power Electronics, vol. 34, no. 2, pp. 1470-1480, 2019.
G. Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., Non-isolated high step-up DC-DC converter with minimum switch voltage stress, in 2017 IEEE Southern Power Electronics Conference (SPEC), 2017.
G. Spiazzi, Marconi, S., and Bevilacqua, A., Step-Up DC-DC converters combining basic topologies with charge pump, in 2016 IEEE 17th Workshop on Control and Modeling for Power Electronics (COMPEL), 2016, pp. 1-6.
V
A. Vallese, Bevilacqua, A., Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., Analysis and Design of an Integrated Notch Filter for the Rejection of Interference in UWB Systems, IEEE Journal of Solid-State Circuits, vol. 44, pp. 331 -343, 2009.
A. Vallese, Bevilacqua, A., Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., An analog front-end with integrated notch filter for 3-5 GHz UWB receivers in 0.13 um CMOS, in Proc. of IEEE 2007 European Solid State Circuits Conference, 2007, pp. 139 -142.
S. Veni, Caruso, M., Tiebout, M., and Bevilacqua, A., A 17 GHz All-npn Push-Pull Class-C VCO, in 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019.
S. Veni, Andreani, P., Caruso, M., Tiebout, M., and Bevilacqua, A., Analysis and Design of a 17-GHz All-npn Push-Pull Class-C VCO, IEEE Journal of Solid-State Circuits, vol. 55, pp. 2345-2355, 2020.
S. Veni, Caruso, M., Seebacher, D., Neviani, A., and Bevilacqua, A., A Fully Integrated 28 GHz Class-J Doherty Power Amplifier in 130 nm BiCMOS, in SMACD / PRIME 2021; International Conference on SMACD and 16th Conference on PRIME, 2021.
D. Vogrig, Gerosa, A., Neviani, A., Graell i Amat, A., Montorsi, G., and Benedetto, S., A 0.35 um CMOS analog turbo decoder for a 40 bit, rate 1/3, UMTS channel code, in Research in Microelectronics and Electronics, 2005 PhD, 2005, vol. 1, pp. 31 - 34 vol.1.
D. Vogrig, Bevilacqua, A., Gerosa, A., and Neviani, A., A Symbol-Duty-Cycled 440-pJ/b Impulse Radio Receiver With 0.57-aJ Sensitivity in 130-nm CMOS, IEEE Transactions on Microwave Theory and Techniques, vol. 65, pp. 565-573, 2017.
D. Vogrig, Gerosa, A., Neviani, A., Amat, A. G., Montorsi, G., and Benedetto, S., A 0.35- mu;m CMOS analog turbo decoder for the 40-bit rate 1/3 UMTS channel code, Solid-State Circuits, IEEE Journal of, vol. 40, pp. 753 - 762, 2005.
D. Vogrig, Bevilacqua, A., Gerosa, A., and Neviani, A., A symbol-duty-cycled 440 pJ/b impulse radio receiver with 0.57 aJ sensitivity in 130 nm CMOS, in Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE, 2015, pp. 243-246.

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