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F. Padovan, Bevilacqua, A., and Neviani, A., “A 20Mb/s, 2.76 pJ/b UWB impulse radio TX with 11.7% efficiency in 130 nm CMOS”, in European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th, 2014, pp. 287-290.

F. Padovan, Tiebout, M., Neviani, A., and Bevilacqua, A., “A 12 GHz 22 dB-Gain-Control SiGe Bipolar VGA With 2° Phase-Shift Variation”, IEEE Journal of Solid-State Circuits, vol. 51, pp. 1525-1536, 2016.

F. Padovan, Tiebout, M., Neviani, A., and Bevilacqua, A., “A 12GHz 22dB-gain-control SiGe bipolar VGA with 2° phase shift variation”, in European Solid-State Circuits Conference (ESSCIRC), ESSCIRC 2015 - 41st, 2015, pp. 56-59.

F. Padovan, Quadrelli, F., Bassi, M., Tiebout, M., and Bevilacqua, A., “A quad-core 15GHz BiCMOS VCO with -124dBc/Hz phase noise at 1MHz offset, -189dBc/Hz FOM, and robust to multimode concurrent oscillations”, in 2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018.

F. Padovan, Tiebout, M., Mertens, K. L. R., Bevilacqua, A., and Neviani, A., “Design of Low-Noise K -Band SiGe Bipolar VCOs: Theory and Implementation”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 607-615, 2015.

F. Padovan, Tiebout, M., Dielacher, F., Bevilacqua, A., and Neviani, A., “SiGe BiCMOS VCO with 27% tuning range for 5G communications”, in 2015 Asia-Pacific Microwave Conference (APMC), 2015, vol. 1, pp. 1-3.

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D. Oloumi, Bevilacqua, A., and Bassi, M., “UWB Radar for High Resolution Breast Cancer Scanning: System, Architectures, and Challenges”, in 2019 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS), 2019.

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A. Novo, Gerosa, A., Neviani, A., Mozzi, A., and Zanoni, E., “A CMOS 0.8 um programmable charge pump for the output stage of an implantable pacemaker”, in Devices, Circuits and Systems, 2000. Proceedings of the 2000 Third IEEE International Caracas Conference on, 2000, pp. 34/1 -34/5.

A. Novo, Gerosa, A., Neviani, A., Mozzi, A., and Zanoni, E., “Programmable voltage multiplier for pacemaker output pulse generation”, Electronics Letters, vol. 35, pp. 560 -561, 1999.

A. Novo, Gerosa, A., and Neviani, A., “A Sub-Micron CMOS Programmable Charge Pump for Implantable Pacemaker”, ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, vol. 27, pp. 211–217, 2001.

A. Novo, Gerosa, A., Neviani, A., Zanoni, E., and Mozzi, A., “Programmable voltage multipliers for pacemaker output pulse generation in CMOS 0.8 um technology”, in Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European, 1999, pp. 386 - 389.

A. Neviani, Bevilacqua, A., Gerosa, A., and Vogrig, D., “Low-power ultra-Wide-Band Impulse Radio transceivers for short range communications”, in 2012 IEEE International Conference on IC Design Technology (ICICDT), 2012, pp. 1 -4.

L. Navarin, Neviani, A., and Bevilacqua, A., “A DLL-Based FSK Demodulator for Asynchronous Communications”, in 2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), 2025.

L. Navarin, Norling, K., Parenzan, M., Uran, A., Ruzzu, S., Rathinam, K., Neviani, A., and Bevilacqua, A., “A 0.13-μm HV CMOS Fully-Integrated Galvanic Isolator for Gate Drivers With Asynchronous Full-Duplex Communication”, IEEE Journal of Solid-State Circuits, pp. 1-12, 2025.

L. Navarin, Norling, K., Parenzan, M., Ruzzu, S., Neviani, A., and Bevilacqua, A., “A Fully-Integrated Galvanic Isolator for Gate Drivers With Asynchronous 100/167 Mb/s ASK/FSK Full-Duplex Communication”, IEEE Solid-State Circuits Letters, vol. 8, pp. 289-292, 2025.

L. Navarin, Norling, K., Parenzan, M., Uran, A., Ruzzu, S., Rathinam, K., Neviani, A., and Bevilacqua, A., “A 5.75mW Fully-Integrated Galvanic Isolator for Gate Drivers with Asynchronous 66.7/66.7 Mb/s Full-Duplex Communication”, in 2025 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2025.

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N. Modolo, De Santi, C., Baratella, G., Bettini, A., Borga, M., Posthuma, N., Bakeroot, B., You, S., Decoutere, S., Bevilacqua, A., Neviani, A., MENEGHESSO, G., Zanoni, E., and Meneghini, M., “Compact Modeling of Nonideal Trapping/Detrapping Processes in GaN Power Devices”, IEEE Transactions on Electron Devices, pp. 1-6, 2022.

G. MENEGHESSO, Zanoni, E., Gerosa, A., PAVAN, P., STADLER, W., ESMARK, K., and GUGGENMOS, G., “Test structures and testing methods for electrostatic discharge: results of PROPHECY project”, MICROELECTRONICS RELIABILITY, vol. 39, pp. 635–646, 1999.

A. Mazzanti and Bevilacqua, A., “Second-Order Equivalent Circuits for the Design of Doubly-Tuned Transformer Matching Networks”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 12, pp. 4157 - 4168, 2018.

A. Mazzanti and Bevilacqua, A., “On the Phase Noise Performance of Transformer-Based CMOS Differential-Pair Harmonic Oscillators”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 2334-2341, 2015.

G. Marin, Cherniak, K., Subotskaya, V., Bodano, E., Sandner, C., and Bevilacqua, A., “A Reconfigurable Switched Capacitor DC–DC Converter With 1.9–6.3-V Input Voltage Range and 85% Peak Efficiency in 28-nm CMOS”, IEEE Solid-State Circuits Letters, vol. 3, pp. 106-109, 2020.

G. Marin, Kim, J., Seo, J. - M., and Neviani, A., “A 13.56 MHz Reconfigurable Step-Up Switched Capacitor Converter for Wireless Power Transfer System in Implantable Medical Devices”, in 2020 IEEE Wireless Power Transfer Conference (WPTC), 2020.

G. Marin, Cherniak, K., Subotskaya, V., Bodano, E., Sandner, C., and Bevilacqua, A., “Optimized Driver Design for Integrated Reconfigurable Switched Capacitor Converters”, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.

G. Marin, Cherniak, K., Subotskaya, V., Bodano, E., Sandner, C., and Bevilacqua, A., “Global Optimization of Reconfigurable Switched Capacitor DC-DC Converters”, in 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019.

S. Marconi, Spiazzi, G., Bevilacqua, A., and Galvano, M., “A Novel Integrated Step-Up Hybrid Converter With Wide Conversion Ratio”, IEEE Transactions on Power Electronics, vol. 35, pp. 2764-2775, 2020.

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