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C

M. Camponeschi, Bevilacqua, A., Tiebout, M., and Neviani, A., “A X-Band I/Q Upconverter in 65 nm CMOS for High Resolution FMCW Radars”, IEEE Microwave and Wireless Components Letters, vol. 22, pp. 141 -143, 2012.

A. D. Capobianco, Khan, M. S., Caruso, M., and Bevilacqua, A., “3-18 GHz compact planar antenna for short-range radar imaging”, Electronics Letters, vol. 50, pp. 1016-1018, 2014.

M. Caruso, Bevilacqua, A., and Neviani, A., “An X-Band Lumped-Element Wilkinson Combiner With Embedded Impedance Transformation”, IEEE Microwave and Wireless Components Letters, vol. 24, pp. 689-691, 2014.

M. Caruso, Bassi, M., Bevilacqua, A., and Neviani, A., “Wideband {2–16GHz} local oscillator generation for short-range radar applications”, in Proceedings of the 2013 ESSCIRC, 2013, pp. 49-52.

M. Caruso, Bassi, M., Bevilacqua, A., and Neviani, A., “A 2-16GHz 204mW 3mm-Resolution Stepped Frequency Radar for Breast Cancer Diagnostic Imaging in 65nm CMOS”, in IEEE ISSCC Digest of Technical Papers, 2013, pp. 204-241.

M. Caruso, Bassi, M., Bevilacqua, A., and Neviani, A., “A 2-16 GHz 65 nm CMOS Stepped-Frequency Radar Transmitter With Harmonic Rejection for High-Resolution Medical Imaging Applications”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 413-422, 2015.

A. Celin and Gerosa, A., “Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs”, in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 1454-1457.

A. Celin and Gerosa, A., “A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior”, in 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, pp. 702-705.

F. Chiocchetta, De Santi, C., Rampazzo, F., Mukherjee, K., Grünenpütt, J., Sommer, D., Blanck, H., Lambert, B., Gerosa, A., MENEGHESSO, G., Zanoni, E., and Meneghini, M., “GaN RF HEMT Reliability: Impact of Device Processing on I-V Curve Stability and Current Collapse”, in 2022 IEEE International Reliability Physics Symposium (IRPS), 2022.

G. M. Cortelazzo, Malavasi, E., Gerosa, A., and Neviani, A., “A New Structure for Video-Rate 2D SC FIR Filters”, in EUSIPCO-96, 1996, vol. 2, pp. 1307–1310.

D

S. Dal Toso, Bevilacqua, A., Tiebout, M., Da Dalt, N., Gerosa, A., and Neviani, A., “An Integrated Divide-by-Two Direct Injection-Locking Frequency Divider for Bands S Through Ku”, IEEE Transactions on Microwave Theory and Techniques, vol. 58, pp. 1686 -1695, 2010.

S. Dal Toso, Bevilacqua, A., Tiebout, M., Marsili, S., Sandner, C., Gerosa, A., and Neviani, A., “UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking”, IEEE Journal of Solid-State Circuits, vol. 43, pp. 2844 -2852, 2008.

S. Dal Toso, Bevilacqua, A., Tiebout, M., Da Dalt, N., Gerosa, A., and Neviani, A., “A 0.06 mm2 11 mW Local Oscillator for the GSM Standard in 65 nm CMOS”, IEEE Journal of Solid-State Circuits, vol. 45, pp. 1295 -1304, 2010.

S. Dal Toso, Bevilacqua, A., Tiebout, M., Da Dalt, N., Gerosa, A., and Neviani, A., “A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOS”, in Proceedings of ESSCIRC 2009, 2009, pp. 444 -447.

S. Dal Toso, Bevilacqua, A., Gerosa, A., and Neviani, A., “A thorough analysis of the tank quality factor in LC oscillators with switched capacitor banks”, in Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS), 2010, pp. 1903 -1906.

S. M. Dartizio, Buccoleri, F., Tesolin, F., Avallone, L., Santiccioli, A., Iesurum, A., Steffan, G., Cherniak, D., Bertulessi, L., Bevilacqua, A., Samori, C., Lacaita, A. L., and Levantino, S., “A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μ s-Locking-Time”, IEEE Journal of Solid-State Circuits, pp. 1-14, 2022.

S. Mattia Dartizio, Buccoleri, F., Tesolin, F., Avallone, L., Santiccioli, A., Iesurum, A., Steffan, G., Cherniak, D., Bertulessi, L., Bevilacqua, A., Samori, C., Lacaita, A. Leonardo, and Levantino, S., “A 68.6fs_rms-Total-integrated-Jitter and 1.5μs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching”, in 2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022.

F

C. Fantozzi, Vangelista, L., Vogrig, D., and Campana, O., “SDR implementation of a DVB-T2 transmitter: The core building blocks”, in 2011 IEEE International Conference on Consumer Electronics (ICCE), 2011, pp. 391 -392.

E. Baiesi Fietta, Seebacher, D., Ponton, D., and Bevilacqua, A., “Efficiency Optimization of Voltage-Mode CMOS Digital Doherty Power Amplifiers”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 1-9, 2025.

E. Baiesi Fietta, Seebacher, D., Ponton, D., and Bevilacqua, A., “Analysis of a Three-Way Voltage-Mode Digital Doherty Power Amplifier for Bluetooth Applications”, in 2025 20th International Conference on PhD Research in Microelectronics and Electronics (PRIME), 2025.

E. Baiesi Fietta, Seebacher, D., Ponton, D., and Bevilacqua, A., “A 0.7 V Multi-Class Digital Doherty Power Amplifier for BLE Applications With 41% Peak DE in 22 nm CMOS”, IEEE Solid-State Circuits Letters, vol. 8, pp. 217 - 220, 2025.

E. Baiesi Fietta, Seebacher, D., Ponton, D., and Bevilacqua, A., “On the Efficiency Enhancement of Voltage Mode Digital Doherty Power Amplifiers”, in 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024.

A. Franceschin, Padovan, F., Nonis, R., and Bevilacqua, A., “On the Optimal Operation Frequency to Minimize Phase Noise in Integrated Harmonic Oscillators”, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 5, pp. 657 - 661, 2018.

A. Franceschin, Andreani, P., Padovan, F., Bassi, M., Nonis, R., and Bevilacqua, A., “A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion”, in ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), 2019.

A. Franceschin, Andreani, P., Padovan, F., Bassi, M., and Bevilacqua, A., “A 19.5-GHz 28-nm Class-C CMOS VCO, With a Reasonably Rigorous Result on 1/f Noise Upconversion Caused by Short-Channel Effects”, IEEE Journal of Solid-State Circuits, vol. 55, pp. 1842-1853, 2020.

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