%0 Conference Paper %B 2016 IEEE International Symposium on Circuits and Systems (ISCAS) %D 2016 %T A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior %A A. Celin %A Gerosa, A. %K algorithm ciclicity %K Algorithm design and analysis %K bidirectional data-weighted averaging algorithm %K CMOS digital integrated circuits %K CMOS technology %K Complexity theory %K DAC %K device mismatch %K digital to analog converters %K digital-analogue conversion %K Hardware %K hardware complexity %K integrated circuit modelling %K Mathematical model %K Modulation %K Multiplexing %K sigma-delta modulation %K sigma-delta modulators %K size 65 nm %K spurs immunity %K Standards %B 2016 IEEE International Symposium on Circuits and Systems (ISCAS) %P 702-705 %8 May %R 10.1109/ISCAS.2016.7527337