%0 Conference Paper %B Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on %D 1999 %T A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters %A Gerosa, A. %A Neviani, A. %A Cortelazzo, G.M. %K 0.8 micron %K 2D SC FIR filters %K analogue storage %K CMOS analogue integrated circuits %K CMOS technology %K convolution %K delay efficient realization %K delays %K filter impulse response symmetry %K filter phase linearity %K FIR filters %K inner filter delays %K partial accumulation analog-RAM-based architecture %K partial convolution products %K picture-in-picture applications %K random-access storage %K switched capacitor filters %K transient response %K video applications %K video signal processing %B Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on %P 195 -198 %R 10.1109/SSMSD.1999.768617