%0 Journal Article %J Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on %D 1999 %T 2D video rate SC FIR filters based on analog RAMs %A Gerosa, A. %A Cortelazzo, G.M. %A Baschirotto, A. %A Malavasi, E. %K 2D video rate SC FIR filters %K analog RAMs %K analog random-access memories %K analogue storage %K area requirements %K broadband characteristic %K CMOS analogue integrated circuits %K delay lines %K FIR filters %K impulse-response symmetries %K linear phase filters %K linear-phase FIR fitters %K low-pass filter %K low-pass filters %K monolithic CMOS analog implementations %K picture-in-picture resizing %K power requirements %K precision requirements %K random-access storage %K switched capacitor filters %K switched-capacitor circuits %K video signal processing %B Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on %V 46 %P 1348 -1360 %R 10.1109/82.803474 %0 Conference Paper %B Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on %D 1999 %T A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters %A Gerosa, A. %A Neviani, A. %A Cortelazzo, G.M. %K 0.8 micron %K 2D SC FIR filters %K analogue storage %K CMOS analogue integrated circuits %K CMOS technology %K convolution %K delay efficient realization %K delays %K filter impulse response symmetry %K filter phase linearity %K FIR filters %K inner filter delays %K partial accumulation analog-RAM-based architecture %K partial convolution products %K picture-in-picture applications %K random-access storage %K switched capacitor filters %K transient response %K video applications %K video signal processing %B Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on %P 195 -198 %R 10.1109/SSMSD.1999.768617