%0 Conference Paper %B 2016 IEEE International Symposium on Circuits and Systems (ISCAS) %D 2016 %T A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior %A A. Celin %A Gerosa, A. %K algorithm ciclicity %K Algorithm design and analysis %K bidirectional data-weighted averaging algorithm %K CMOS digital integrated circuits %K CMOS technology %K Complexity theory %K DAC %K device mismatch %K digital to analog converters %K digital-analogue conversion %K Hardware %K hardware complexity %K integrated circuit modelling %K Mathematical model %K Modulation %K Multiplexing %K sigma-delta modulation %K sigma-delta modulators %K size 65 nm %K spurs immunity %K Standards %B 2016 IEEE International Symposium on Circuits and Systems (ISCAS) %P 702-705 %8 May %R 10.1109/ISCAS.2016.7527337 %0 Conference Paper %B 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) %D 2014 %T A linear model of efficiency for Switched-Capacitor RF Power-Amplifiers %A Passamani, A %A Ponton, D. %A Knoblinger, G. %A Bevilacqua, A. %K back-of-the-envelope equations %K C-DAC %K CMOS analogue integrated circuits %K CMOS integrated circuits %K DPA %K efficiency %K Equations %K Integrated circuit modeling %K intrinsic power %K linear model %K low-power CMOS technology %K Mathematical model %K output stage inverter %K PA %K power %K Radio frequency %K radio-frequency switched-capacitor power amplifiers %K radiofrequency power amplifiers %K RF-DAC %K SCPA %K Semiconductor device modeling %K size 28 nm %K SpectreRF simulations %K switched capacitor networks %K Switches %K target output power %B 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) %P 1-4 %8 June %R 10.1109/PRIME.2014.6872748