@conference {7556691,
title = {Step-Up DC-DC converters combining basic topologies with charge pump},
booktitle = {2016 IEEE 17th Workshop on Control and Modeling for Power Electronics (COMPEL)},
year = {2016},
month = {June},
pages = {1-6},
keywords = {boost converters, capacitors, charge pump, charge pump circuits, Charge pumps, conduction losses, DC-DC power convertors, filter inductor, filters, floating load connection, hybrid DC-DC converters, hybrid step-up DC-DC converter topology, inductor-based switching cell, inductors, magnetic element energy reduction, Standards, switched capacitor networks, switched-capacitor cell, Switches, switching convertors, Switching loss, switching losses, Topology, voltage stress reduction},
doi = {10.1109/COMPEL.2016.7556691},
author = {G. Spiazzi and S. Marconi and Bevilacqua, A.}
}
@conference {7364367,
title = {Analysis and design of a 1.1dB-IL third-order Matching Network for Switched-Capacitor PAs},
booktitle = {Nordic Circuits and Systems Conference (NORCAS): NORCHIP International Symposium on System-on-Chip (SoC), 2015},
year = {2015},
month = {Oct},
pages = {1-4},
keywords = {Bluetooth, Capacitance, circuit optimisation, circuit simulations, CMOS analogue integrated circuits, CMOS RF metal stack, frequency 2.4 GHz, integrated circuit design, Integrated circuit modeling, Manganese, power amplifiers, Power generation, Radio frequency, Resistance, size 28 nm, switched capacitor networks, switched capacitor power amplifier, switched-capacitor PA, Switches, third-order matching network, voltage 1.1 V},
doi = {10.1109/NORCHIP.2015.7364367},
author = {Passamani, A and Ponton, D. and Knoblinger, G. and Bevilacqua, A.}
}
@conference {6872748,
title = {A linear model of efficiency for Switched-Capacitor RF Power-Amplifiers},
booktitle = {2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)},
year = {2014},
month = {June},
pages = {1-4},
keywords = {back-of-the-envelope equations, C-DAC, CMOS analogue integrated circuits, CMOS integrated circuits, DPA, efficiency, Equations, Integrated circuit modeling, intrinsic power, linear model, low-power CMOS technology, Mathematical model, output stage inverter, PA, power, Radio frequency, radio-frequency switched-capacitor power amplifiers, radiofrequency power amplifiers, RF-DAC, SCPA, Semiconductor device modeling, size 28 nm, SpectreRF simulations, switched capacitor networks, Switches, target output power},
doi = {10.1109/PRIME.2014.6872748},
author = {Passamani, A and Ponton, D. and Knoblinger, G. and Bevilacqua, A.}
}
@conference {957630,
title = {A ready-to-use design procedure for operational transconductance amplifiers that minimizes power consumption},
booktitle = {Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on},
volume = {2},
year = {2001},
pages = {949 -952 vol.2},
keywords = {bias current, circuit optimisation, design equations, design procedure, electric current, folded-cascode amplifier, minimized power consumption, network synthesis, operational amplifiers, operational transconductance amplifiers, OTA design procedure, OTA performance, power optimized OTA, switched capacitor networks, switched capacitor stage, transistor size},
doi = {10.1109/ICECS.2001.957630},
author = {Gerosa, A.}
}