@conference {768617, title = {A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters}, booktitle = {Mixed-Signal Design, 1999. SSMSD {\textquoteright}99. 1999 Southwest Symposium on}, year = {1999}, pages = {195 -198}, keywords = {0.8 micron, 2D SC FIR filters, analogue storage, CMOS analogue integrated circuits, CMOS technology, convolution, delay efficient realization, delays, filter impulse response symmetry, filter phase linearity, FIR filters, inner filter delays, partial accumulation analog-RAM-based architecture, partial convolution products, picture-in-picture applications, random-access storage, switched capacitor filters, transient response, video applications, video signal processing}, doi = {10.1109/SSMSD.1999.768617}, author = {Gerosa, A. and Neviani, A. and Cortelazzo, G.M.} }