@article {7410026, title = {A 64-Channel 965-uW Neural Recording SoC With UWB Wireless Transmission in 130-nm CMOS}, journal = {IEEE Transactions on Circuits and Systems II: Express Briefs}, volume = {63}, number = {6}, year = {2016}, month = {June}, pages = {528-532}, keywords = {64-channel neural recording SoC, analog front end, Analog-digital conversion, Bandwidth, biomedical electronics, biomedical telemetry, bit rate 20 Mbit/s, BMI, Brain???machine interface (BMI), capacitors, CMOS digital integrated circuits, CMOS process, efficiency 11.7 percent, Electronics packaging, implantable electronics, inputreferred noise, low-noise bandpass amplifier, noise efficiency factor, power 965 muW, Power demand, pulse position modulation, pulse-position modulation ultrawideband transmitter, radiotelemetry, raw neural signal, SAR analog-to-digital converter, size 130 nm, system-on-chip, transmitters, ultra wideband communication, ultra-wideband (UWB), ultrawideband (UWB), UWB wireless transmission, voltage 0.5 V, voltage 5.6 V, Wireless communication, wireless neural recording systems, wireless telemetry, word length 10 bit}, issn = {1549-7747}, doi = {10.1109/TCSII.2016.2530882}, author = {S. Brenna and Padovan, F. and Neviani, A. and Bevilacqua, A. and A. Bonfanti and A. L. Lacaita} } @article {5492325, title = {A 0.06 mm2 11 mW Local Oscillator for the GSM Standard in 65 nm CMOS}, journal = {IEEE Journal of Solid-State Circuits}, volume = {45}, number = {7}, year = {2010}, pages = {1295 -1304}, keywords = {cellular radio, CMOS integrated circuits, CMOS process, current 9 mA, divide-by-four injection-locked frequency divider, frequency 13 GHz to 15 GHz, frequency 3 MHz, frequency dividers, GSM standard, LC VCO, local oscillator, MMIC oscillators, network topology, ring oscillator-based topology, size 65 nm, thin-oxide devices, voltage 1.2 V, voltage-controlled oscillators}, issn = {0018-9200}, doi = {10.1109/JSSC.2010.2049457}, author = {Dal Toso, S. and Bevilacqua, A. and Tiebout, M. and Da Dalt, N. and Gerosa, A. and Neviani, A.} } @conference {4263311, title = {A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency}, booktitle = {13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS {\textquoteright}06. }, year = {2006}, pages = {90 -93}, keywords = {bandwidth 14 kHz to 150 kHz, circuit tuning, class AB operation filter, CMOS analogue integrated circuits, CMOS process, CMOS technology, low-pass filter, low-pass filters, low-power electronics, low-voltage filter, parasitic capacitances effect, size 0.8 mum, third-order log-domain filter, tunable frequency, voltage 1.2 V}, doi = {10.1109/ICECS.2006.379708}, author = {Maniero, A. and Bevilacqua, A. and Gerosa, A. and Neviani, A.} } @conference {1332754, title = {An ultra-wideband CMOS LNA for 3.1 to 10.6 GHz wireless receivers}, booktitle = {Digest of Technical Papers of 2004 IEEE International Solid-State Circuits Conference}, year = {2004}, pages = {382 - 533 Vol.1}, keywords = {0.18 micron, 3.1 to 10.6 GHz, 4 dB, 9 mW, 9.3 dB, band-pass filters, Chebyshev filters, CMOS analogue integrated circuits, CMOS process, field effect MMIC, IC power gain, IIP3, input match, input three-section band-pass Chebyshev filter, integrated circuit measurement, MMIC amplifiers, NF, radio receivers, ultra-wideband CMOS LNA, UWB LNA, wideband amplifiers, wireless receivers}, issn = {0193-6530}, doi = {10.1109/ISSCC.2004.1332754}, author = {Bevilacqua, A. and Niknejad, A.M.} } @conference {914956, title = {An analog front-end for the acquisition of biomedical signals, fully integrated in a 0.8 um CMOS process}, booktitle = {Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on}, year = {2001}, pages = {152 -157}, keywords = {0.8 micron, analog front-end, analogue processing circuits, band-pass filtering, biomedical signal, biquadratic filters, cardiac pacemaker, CMOS analogue integrated circuits, CMOS process, log-domain filter, low-noise pre-amplifier, low-power design, low-power electronics, pacemakers, peak detection, preamplifiers, SC biquadratic cell, sensing chain, sigma-delta converter, sigma-delta modulation, switched capacitor filters}, doi = {10.1109/SSMSD.2001.914956}, author = {Gerosa, A. and Novo, A. and Neviani, A.} } @conference {914944, title = {A fully integrated 8-bit, 20 MHz, truly random numbers generator, based on a chaotic system}, booktitle = {Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on}, year = {2001}, pages = {87 -92}, keywords = {0.8 micron, 20 MHz, 50 mW, 8 bit, analogue-digital conversion, ASIC, chaos generators, chaotic system, circuit nonidealities, CMOS integrated circuits, CMOS process, compact architecture, fully integrated implementation, mixed analogue-digital integrated circuits, pipeline ADC, pipeline processing, post-layout simulations, random number generation, random numbers generator, statistical independence, uniform distribution}, doi = {10.1109/SSMSD.2001.914944}, author = {Gerosa, A. and Bernardini, R. and Pietri, S.} }