@conference {914956, title = {An analog front-end for the acquisition of biomedical signals, fully integrated in a 0.8 um CMOS process}, booktitle = {Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on}, year = {2001}, pages = {152 -157}, keywords = {0.8 micron, analog front-end, analogue processing circuits, band-pass filtering, biomedical signal, biquadratic filters, cardiac pacemaker, CMOS analogue integrated circuits, CMOS process, log-domain filter, low-noise pre-amplifier, low-power design, low-power electronics, pacemakers, peak detection, preamplifiers, SC biquadratic cell, sensing chain, sigma-delta converter, sigma-delta modulation, switched capacitor filters}, doi = {10.1109/SSMSD.2001.914956}, author = {Gerosa, A. and Novo, A. and Neviani, A.} } @conference {914944, title = {A fully integrated 8-bit, 20 MHz, truly random numbers generator, based on a chaotic system}, booktitle = {Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on}, year = {2001}, pages = {87 -92}, keywords = {0.8 micron, 20 MHz, 50 mW, 8 bit, analogue-digital conversion, ASIC, chaos generators, chaotic system, circuit nonidealities, CMOS integrated circuits, CMOS process, compact architecture, fully integrated implementation, mixed analogue-digital integrated circuits, pipeline ADC, pipeline processing, post-layout simulations, random number generation, random numbers generator, statistical independence, uniform distribution}, doi = {10.1109/SSMSD.2001.914944}, author = {Gerosa, A. and Bernardini, R. and Pietri, S.} } @conference {921851, title = {A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker}, booktitle = {Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on}, volume = {1}, year = {2001}, pages = {296 -299 vol. 1}, keywords = {0.8 micron, 2.8 muW, 50 to 70 dB, active filters, cardiac pacemaker, cardiac signal, class AB log-domain 2nd order band-pass filter, CMOS, CMOS analogue integrated circuits, feedback amplifiers, input-referred noise, integrated circuit noise, low-power electronics, micro-power low noise log-domain amplifier, pacemakers, programmable gain, sensing chain, weak inversion}, doi = {10.1109/ISCAS.2001.921851}, author = {Gerosa, A. and Novo, A. and Mengalli, A. and Neviani, A.} } @conference {869804, title = {A CMOS 0.8 um programmable charge pump for the output stage of an implantable pacemaker}, booktitle = {Devices, Circuits and Systems, 2000. Proceedings of the 2000 Third IEEE International Caracas Conference on}, year = {2000}, pages = {34/1 -34/5}, keywords = {0.8 micron, 2 to 2.8 V, battery longevity, CMOS integrated circuits, CMOS technology, implantable pacemaker, mixed analogue-digital integrated circuits, output stage, output voltage programmability, pacemakers, parasitic coupling, programmable charge pump, pulse generator, pulse generators, stimulation efficacy, supply voltage, voltage multiplier, voltage multipliers}, doi = {10.1109/ICCDCS.2000.869804}, author = {Novo, A. and Gerosa, A. and Neviani, A. and Mozzi, A. and Zanoni, E.} } @conference {876786, title = {Low-power sensing and digitization of cardiac signals based on sigma-delta conversion}, booktitle = {Low Power Electronics and Design, 2000. ISLPED {\textquoteright}00. Proceedings of the 2000 International Symposium on}, year = {2000}, pages = {216 - 218}, keywords = {0.8 micron, 2 muW, 2 V, 50 to 150 Hz, 8 kHz, cardiac signals, CMOS integrated circuits, CMOS technology, digitization, dynamic range, low-power circuits, low-power electronics, low-power sensing, medical signal processing, oversampled frequency, oversampling conversion techniques, pacemaker, pacemakers, power dissipation, sigma-delta conversion, sigma-delta modulation, signal sampling, switched networks, switched op-amp technique, third order modulator}, doi = {10.1109/LPE.2000.155282}, author = {Gerosa, A. and Novo, A. and Neviani, A.} } @conference {768617, title = {A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters}, booktitle = {Mixed-Signal Design, 1999. SSMSD {\textquoteright}99. 1999 Southwest Symposium on}, year = {1999}, pages = {195 -198}, keywords = {0.8 micron, 2D SC FIR filters, analogue storage, CMOS analogue integrated circuits, CMOS technology, convolution, delay efficient realization, delays, filter impulse response symmetry, filter phase linearity, FIR filters, inner filter delays, partial accumulation analog-RAM-based architecture, partial convolution products, picture-in-picture applications, random-access storage, switched capacitor filters, transient response, video applications, video signal processing}, doi = {10.1109/SSMSD.1999.768617}, author = {Gerosa, A. and Neviani, A. and Cortelazzo, G.M.} }