@conference {484, title = {A 28nm Low-Voltage Digital Power-Amplifier for QAM-256 WIFI Applications in 0.5mm2 Area w/ 2D Digital-Pre-Distortion and Package Combiner}, booktitle = {2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)}, year = {2018}, month = {Dec}, keywords = {Area, CMOS technology, Combiner-in-Package, DAT, DPA, DPD, efficiency, EVM, power, power amplifier, power amplifiers, Power Combiner, Power combiners, Power generation, Power measurement, Pre-Distortion, System-in-Package, WIFI, Windings, Wireless, Wireless fidelity}, doi = {10.1109/ICECS.2018.8617936}, author = {A. Passamani and D. Ponton and A. Wolter and G. Knoblinger and Bevilacqua, A.} } @conference {7527337, title = {A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior}, booktitle = {2016 IEEE International Symposium on Circuits and Systems (ISCAS)}, year = {2016}, month = {May}, pages = {702-705}, keywords = {algorithm ciclicity, Algorithm design and analysis, bidirectional data-weighted averaging algorithm, CMOS digital integrated circuits, CMOS technology, Complexity theory, DAC, device mismatch, digital to analog converters, digital-analogue conversion, Hardware, hardware complexity, integrated circuit modelling, Mathematical model, Modulation, Multiplexing, sigma-delta modulation, sigma-delta modulators, size 65 nm, spurs immunity, Standards}, doi = {10.1109/ISCAS.2016.7527337}, author = {A. Celin and Gerosa, A.} } @conference {7168918, title = {Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs}, booktitle = {2015 IEEE International Symposium on Circuits and Systems (ISCAS)}, year = {2015}, month = {May}, pages = {1454-1457}, keywords = {Algorithm design and analysis, analog-to-digital converter, Clocks, CMOS digital integrated circuits, CMOS integrated circuits, CMOS technologies, CMOS technology, data weighted averaging, DEM algorithms, dynamic element matching algorithms, hardware complexity, Heuristic algorithms, internal DAC, logic design, mismatch cancellation, Modulation, multibit sigma-delta ADC, multibit ΣΔ ADC, Noise, optimal DWA design, sigma-delta modulation, sigma-delta modulator, size 65 nm, Timing, ΣΔ modulator}, issn = {0271-4302}, doi = {10.1109/ISCAS.2015.7168918}, author = {A. Celin and Gerosa, A.} } @conference {6942078, title = {A 20Mb/s, 2.76 pJ/b UWB impulse radio TX with 11.7\% efficiency in 130 nm CMOS}, booktitle = {European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th}, year = {2014}, month = {Sept}, pages = {287-290}, keywords = {antenna, Antennas, Bandwidth, bit rate 20 Mbit/s, CMOS integrated circuits, CMOS technology, digitally controlled oscillator, efficiency 11.7 percent, energy conservation, frequency 7.25 GHz to 8.5 GHz, low-voltage supply, microwave antennas, microwave oscillators, operation efficiency, oscillators, overall energy efficiency, PPM-modulated pulses, radio transmitters, size 130 nm, supporting communication ranges, ultra wideband communication, ultralow energy neural recording applications, UWB impulse radio transmitter, UWB impulse radio TX, voltage 0.5 V, Wireless communication}, issn = {1930-8833}, doi = {10.1109/ESSCIRC.2014.6942078}, author = {Padovan, F. and Bevilacqua, A. and Neviani, A.} } @conference {5537236, title = {Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end}, booktitle = {Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS)}, year = {2010}, pages = {2063 -2066}, keywords = {accurate time-variant analysis, CMOS front-end, CMOS integrated circuits, CMOS technology, frequency 2.2 GHz, gain 27 dB, mixers (circuits), noise figure 13 dB, power 1.3 mW, quadrature mixers, voltage 1 V}, doi = {10.1109/ISCAS.2010.5537236}, author = {Camponeschi, M. and Bevilacqua, A. and Neviani, A. and Andreani, P.} } @conference {5537336, title = {A digitally programmable ring oscillator in the UWB range}, booktitle = {Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS),}, year = {2010}, pages = {1101 -1104}, keywords = {CMOS integrated circuits, CMOS technology, digitally programmable ring oscillator, field effect MMIC, frequency 4 GHz to 12.5 GHz, impulse radio UWB communication, impulse radio UWB transmitter, inverter cell, MMIC oscillators, multiloop ring oscillator, oscillation frequency, size 0.13 mum, switch-on time, transmitters, tuning range, ultra wideband communication}, doi = {10.1109/ISCAS.2010.5537336}, author = {Gerosa, A. and Sold{\`a}, S. and Bevilacqua, A. and Vogrig, D. and Neviani, A.} } @conference {5537807, title = {Low-power UWB transmitter using a combined mixer and power amplifier}, booktitle = {Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on}, year = {2010}, pages = {333 -336}, keywords = {CMOS technology, combined mixer, energy efficient transmitter, fourth-order ladder filter, Gaussian pulse, ladder filters, low power UWB transmitter, monolithic transformer, MXR-PA, power amplifier, power amplifiers, transmitter power efficiency, ultra wideband communication, UWB impulse radio, wireless sensor networks}, doi = {10.1109/ISCAS.2010.5537807}, author = {Sold{\`a}, S. and Caruso, M. and Vogrig, D. and Bevilacqua, A. and Gerosa, A. and Neviani, A.} } @article {4787056, title = {An Energy-Detector for Noncoherent Impulse-Radio UWB Receivers}, journal = {IEEE Transactions on Circuits and Systems I: Regular Papers}, volume = {56}, number = {5}, year = {2009}, pages = {1030 -1040}, keywords = {CMOS integrated circuits, CMOS technology, current-to voltage converter, electric sensing devices, energy-detector, Gm-C integrator, MOS transistor quadratic characteristics, MOSFET, noncoherent impulse-radio UWB receivers, power 5.4 mW, radio receivers, short channel effects, size 0.18 mum, synchronization, ultra wideband communication, voltage follower current sensor}, issn = {1549-8328}, doi = {10.1109/TCSI.2009.2016125}, author = {Gerosa, A. and Sold{\`a}, S. and Bevilacqua, A. and Vogrig, D. and Neviani, A.} } @article {1603590, title = {A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers}, journal = {IEEE Microwave and Wireless Components Letters}, volume = {16}, number = {3}, year = {2006}, pages = {134 -136}, keywords = {0.13 micron, 1 dB, 1.5 V, 11 mA, 3 to 5 GHz, 3.5 dB, 9.5 dB, CMOS integrated circuits, CMOS technology, differential amplifiers, differential CMOS, integrated circuit noise, integrated differential low-power amplifier, ladder input network, LNA, low noise amplifiers, low-noise amplifier, microwave receivers, minimum noise figure, MMIC amplifiers, peak power gain, radio receivers, ultra wideband communication, ultra wideband system, ultra wideband wireless receiver, UWB}, issn = {1531-1309}, doi = {10.1109/LMWC.2006.869855}, author = {Bevilacqua, A. and Sandner, C. and Gerosa, A. and Neviani, A.} } @conference {4263311, title = {A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency}, booktitle = {13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS {\textquoteright}06. }, year = {2006}, pages = {90 -93}, keywords = {bandwidth 14 kHz to 150 kHz, circuit tuning, class AB operation filter, CMOS analogue integrated circuits, CMOS process, CMOS technology, low-pass filter, low-pass filters, low-power electronics, low-voltage filter, parasitic capacitances effect, size 0.8 mum, third-order log-domain filter, tunable frequency, voltage 1.2 V}, doi = {10.1109/ICECS.2006.379708}, author = {Maniero, A. and Bevilacqua, A. and Gerosa, A. and Neviani, A.} } @conference {957696, title = {A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization}, booktitle = {Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on}, volume = {2}, year = {2001}, pages = {1099 -1102 vol.2}, keywords = {0.35 micron, 0.35 mu, 300 MHz, 700 mW, analogue integrated circuits, anti-alias filter, bandwidth tunability, bit error rate, circuit bandwidth, CMOS memory circuits, CMOS technology, data rate, digital simulation, disc drives, equalisers, equalizer, fractionally spaced equalization, frequency errors, hard discs, hard disk drives, m, MATLAB, memory architecture, power consumption, pulse shaping circuits, pulse shaping precision, sampled data circuits, sampling phase, storage density, variable delay filter}, doi = {10.1109/ICECS.2001.957696}, author = {Gerosa, A. and Neviani, A. and Xotta, A. and Mian, G.A.} } @conference {869804, title = {A CMOS 0.8 um programmable charge pump for the output stage of an implantable pacemaker}, booktitle = {Devices, Circuits and Systems, 2000. Proceedings of the 2000 Third IEEE International Caracas Conference on}, year = {2000}, pages = {34/1 -34/5}, keywords = {0.8 micron, 2 to 2.8 V, battery longevity, CMOS integrated circuits, CMOS technology, implantable pacemaker, mixed analogue-digital integrated circuits, output stage, output voltage programmability, pacemakers, parasitic coupling, programmable charge pump, pulse generator, pulse generators, stimulation efficacy, supply voltage, voltage multiplier, voltage multipliers}, doi = {10.1109/ICCDCS.2000.869804}, author = {Novo, A. and Gerosa, A. and Neviani, A. and Mozzi, A. and Zanoni, E.} } @conference {876786, title = {Low-power sensing and digitization of cardiac signals based on sigma-delta conversion}, booktitle = {Low Power Electronics and Design, 2000. ISLPED {\textquoteright}00. Proceedings of the 2000 International Symposium on}, year = {2000}, pages = {216 - 218}, keywords = {0.8 micron, 2 muW, 2 V, 50 to 150 Hz, 8 kHz, cardiac signals, CMOS integrated circuits, CMOS technology, digitization, dynamic range, low-power circuits, low-power electronics, low-power sensing, medical signal processing, oversampled frequency, oversampling conversion techniques, pacemaker, pacemakers, power dissipation, sigma-delta conversion, sigma-delta modulation, signal sampling, switched networks, switched op-amp technique, third order modulator}, doi = {10.1109/LPE.2000.155282}, author = {Gerosa, A. and Novo, A. and Neviani, A.} } @conference {768617, title = {A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters}, booktitle = {Mixed-Signal Design, 1999. SSMSD {\textquoteright}99. 1999 Southwest Symposium on}, year = {1999}, pages = {195 -198}, keywords = {0.8 micron, 2D SC FIR filters, analogue storage, CMOS analogue integrated circuits, CMOS technology, convolution, delay efficient realization, delays, filter impulse response symmetry, filter phase linearity, FIR filters, inner filter delays, partial accumulation analog-RAM-based architecture, partial convolution products, picture-in-picture applications, random-access storage, switched capacitor filters, transient response, video applications, video signal processing}, doi = {10.1109/SSMSD.1999.768617}, author = {Gerosa, A. and Neviani, A. and Cortelazzo, G.M.} }