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2007
A. Gerosa, Soldan, M., Bevilacqua, A., and Neviani, A., A 0.18-um CMOS Squarer Circuit for a Non-Coherent UWB Receiver, in IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007, 2007, pp. 421 -424.
A. Vallese, Bevilacqua, A., Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., An analog front-end with integrated notch filter for 3-5 GHz UWB receivers in 0.13 um CMOS, in Proc. of IEEE 2007 European Solid State Circuits Conference, 2007, pp. 139 -142.
A. Bevilacqua, Maniero, A., Gerosa, A., and Neviani, A., An Integrated Solution for Suppressing WLAN Signals in UWB Receivers, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54, pp. 1617 -1625, 2007.
A. Bevilacqua, Sandner, C., Gerosa, A., and Neviani, A., Quadrature VCOs Based on Coupled PLLs, in IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007, 2007, pp. 2140 -2143.
A. Bevilacqua, Pavan, F. P., Sandner, C., Gerosa, A., and Neviani, A., Transformer-Based Dual-Mode Voltage-Controlled Oscillators, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 54, pp. 293 -297, 2007.
2006
A. Bevilacqua, Maniero, A., Gerosa, A., and Neviani, A., A 0.35 um SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection, in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06. , 2006, pp. 1015 -1018.
A. Bevilacqua, Pavan, F. P., Sandner, C., Gerosa, A., and Neviani, A., A 3.4-7 GHz Transformer-Based Dual-mode Wideband VCO, in Proceedings of the 32nd European Solid-State Circuits Conference, 2006, pp. 440 -443.
A. Gerosa, Xotta, A., Bevilacqua, A., and Neviani, A., An A/D Converter for Multimode Wireless Receivers, Based on the Cascade of a Double-Sampling Σ Δ Modulator and a Flash Converter, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 53, pp. 2109 -2124, 2006.
A. Graell i Amat, Vogrig, D., Benedetto, S., Montorsi, G., Neviani, A., and Gerosa, A., CTH08-3: Reconfigurable Analog Decoder for a Serially Concatenated Convolutional Code, in Global Telecommunications Conference, 2006. GLOBECOM '06. IEEE, 2006, pp. 1 -6.
A. Graell i Amat, Benedetto, S., Montorsi, G., Vogrig, D., Neviani, A., and Gerosa, A., Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code, Communications, IEEE Transactions on, vol. 54, pp. 1973 -1982, 2006.
A. Gerosa, Elettronica Digitale, Esercizi risolti. PADOVA: Edizioni Libreria Progetto, 2006, pp. 1–216.
A. Bevilacqua, Sandner, C., Gerosa, A., and Neviani, A., A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers, IEEE Microwave and Wireless Components Letters, vol. 16, pp. 134 -136, 2006.
A. Graell i Amat, Vogrig, D., Benedetto, S., Montorsi, G., SOLDA, S., Neviani, A., and Gerosa, A., Iterative Analog Decoder for a SCCC, in Analog Decoding Workshop, 2006.
A. Maniero, Bevilacqua, A., Gerosa, A., and Neviani, A., A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency, in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06. , 2006, pp. 90 -93.
A. Gerosa, Bevilacqua, A., Neviani, A., and Xotta, A., An optimal architecture for a multimode ADC, based on the cascade of a Sigma-Delta modulator and a flash converter, in Proceedings of 2006 IEEE International Symposium on Circuits and Systems, 2006, p. 4 pp.

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