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Integrated Circuits for Analog and RF µ-Systems
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A. Celin
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O
A. Celin
and
Gerosa, A.
,
“
Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs
”
, in
2015 IEEE International Symposium on Circuits and Systems (ISCAS)
, 2015, pp. 1454-1457.
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R
A. Celin
and
Gerosa, A.
,
“
A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior
”
, in
2016 IEEE International Symposium on Circuits and Systems (ISCAS)
, 2016, pp. 702-705.
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Recent Publications
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs
On the Benefits of the Common-Mode Resonance On the 1/f2 Phase Noise Sideband
A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner
On the Design Challenges of Class-C Oscillators in Ultra-Scaled CMOS Technologies
More...