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2022
N. Modolo
,
De Santi, C.
,
Baratella, G.
,
Bettini, A.
,
Borga, M.
,
Posthuma, N.
,
Bakeroot, B.
,
You, S.
,
Decoutere, S.
,
Bevilacqua, A.
,
Neviani, A.
,
MENEGHESSO, G.
,
Zanoni, E.
, and
Meneghini, M.
,
“
Compact Modeling of Nonideal Trapping/Detrapping Processes in GaN Power Devices
”
,
IEEE Transactions on Electron Devices
, pp. 1-6, 2022.
DOI
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1999
G. MENEGHESSO
,
Zanoni, E.
,
Gerosa, A.
,
PAVAN, P.
,
STADLER, W.
,
ESMARK, K.
, and
GUGGENMOS, G.
,
“
Test structures and testing methods for electrostatic discharge: results of PROPHECY project
”
,
MICROELECTRONICS RELIABILITY
, vol. 39, pp. 635–646, 1999.
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2018
A. Mazzanti
and
Bevilacqua, A.
,
“
Second-Order Equivalent Circuits for the Design of Doubly-Tuned Transformer Matching Networks
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 65, no. 12, pp. 4157 - 4168, 2018.
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2015
A. Mazzanti
and
Bevilacqua, A.
,
“
On the Phase Noise Performance of Transformer-Based CMOS Differential-Pair Harmonic Oscillators
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 62, pp. 2334-2341, 2015.
DOI
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2020
G. Marin
,
Cherniak, K.
,
Subotskaya, V.
,
Bodano, E.
,
Sandner, C.
, and
Bevilacqua, A.
,
“
Optimized Driver Design for Integrated Reconfigurable Switched Capacitor Converters
”
, in
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
, 2020.
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G. Marin
,
Cherniak, K.
,
Subotskaya, V.
,
Bodano, E.
,
Sandner, C.
, and
Bevilacqua, A.
,
“
A Reconfigurable Switched Capacitor DC–DC Converter With 1.9–6.3-V Input Voltage Range and 85% Peak Efficiency in 28-nm CMOS
”
,
IEEE Solid-State Circuits Letters
, vol. 3, pp. 106-109, 2020.
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G. Marin
,
Kim, J.
,
Seo, J. - M.
, and
Neviani, A.
,
“
A 13.56 MHz Reconfigurable Step-Up Switched Capacitor Converter for Wireless Power Transfer System in Implantable Medical Devices
”
, in
2020 IEEE Wireless Power Transfer Conference (WPTC)
, 2020.
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2019
G. Marin
,
Cherniak, K.
,
Subotskaya, V.
,
Bodano, E.
,
Sandner, C.
, and
Bevilacqua, A.
,
“
Global Optimization of Reconfigurable Switched Capacitor DC-DC Converters
”
, in
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)
, 2019.
DOI
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2018
S. Marconi
,
Barbero, M. B.
,
Fougeron, D.
,
Godiot, S.
,
Menouni, M.
,
Pangaud, P.
,
Rozanov, A.
,
Breugnon, P.
,
Bomben, M.
,
Calderini, G.
,
Crescioli, F.
,
Le Dortz, O.
,
Marchiori, G.
,
Dzahini, D.
,
Rarbi, F. E.
,
Gaglione, R.
,
Krüger, H.
,
Daas, M.
,
Dieter, Y.
,
Hemperek, T.
,
Hügging, F.
,
Moustakas, K.
,
Pohl, D.
,
Rymaszewski, P.
,
Standke, M.
,
Vogt, M.
,
Wang, T.
,
Wermes, N.
,
Karagounis, M.
,
Stiller, A.
,
Marzocca, C.
,
Marzocca, G.
,
De Robertis, G.
,
Loddo, F.
,
Licciulli, F.
,
Andreazza, A.
,
Liberali, V.
,
Stabile, A.
,
Frontini, L.
,
Bagatin, M.
,
Bisello, D.
,
Gerardin, S.
,
Mattiazzo, S.
,
Paccagnella, A.
,
Vogrig, D.
,
Bonaldo, S.
,
Bacchetta, N.
,
Gaioni, L.
,
De Canio, F.
,
Manghisoni, M.
,
Re, V.
,
Riceputi, E.
,
Traversi, G.
,
Ratti, L.
,
Vacchi, C.
,
Androsov, K.
,
Beccherle, R.
,
Magazzu, G.
,
Minuti, M.
,
Morsani, F.
,
Palla, F.
,
Poulios, S.
,
Bilei, G. M.
,
Menichelli, M.
,
Placidi, P.
,
Dellacasa, G.
,
Demaria, N.
,
Mazza, G.
,
Monteil, E.
,
Pacher, L.
,
Paternò, A.
,
Rivetti, A.
,
Rolo, M. D. Da Roch
,
Gajanana, D.
,
Gromov, V.
,
van Eijk, B.
,
Kluit, R.
,
Vitkovskiy, A.
,
Benka, T.
,
Havranek, M.
,
Janoska, Z.
,
Marcisovsky, M.
,
Neue, G.
,
Tomasek, L.
,
Kafka, V.
,
Vrba, V.
,
Lopez-Morillo, E.
,
Palomo, F. R.
,
Muñoz, F.
,
Vila, I.
,
Jiménez, E. M. S.
,
Abbaneo, D.
,
Christiansen, J.
,
Orfanelli, S.
,
Casas, L. M. Jara
,
Conti, E.
,
Bell, S.
,
Prydderch, M. L.
,
Thomas, S.
,
Christian, D. C.
,
Deptuch, G.
,
Fahim, F.
,
Hoff, J.
,
Lipton, R.
,
Liu, T.
,
Zimmerman, T.
,
Miryala, S.
,
Garcia-Sciveres, M.
,
Gnani, D.
,
Krieger, A.
,
Papadopoulou, K.
,
Heim, T.
,
Carney, R.
,
Nachman, B.
,
Renteira, C.
,
Wallangen, V.
,
Hoeferkamp, M.
, and
Seidel, S.
,
“
Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC
”
, in
2018 IEEE Nuclear Science Symposium and Medical Imaging Conference Proceedings (NSS/MIC)
, 2018.
DOI
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2020
S. Marconi
,
Spiazzi, G.
,
Bevilacqua, A.
, and
Galvano, M.
,
“
A Novel Integrated Step-Up Hybrid Converter With Wide Conversion Ratio
”
,
IEEE Transactions on Power Electronics
, vol. 35, pp. 2764-2775, 2020.
DOI
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2006
A. Maniero
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency
”
, in
13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06.
, 2006, pp. 90 -93.
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2003
A. Maniero
,
Gerosa, A.
, and
Neviani, A.
,
“
Performance Optimization in Micro-Power, Low-Voltage, Log-Domain Filters in Pure CMOS Technology
”
, in
ISCAS
, 2003, vol. 1, pp. 565–568.
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2020
D. Manente
,
Padovan, F.
,
Seebacher, D.
,
Bassi, M.
, and
Bevilacqua, A.
,
“
A 28-GHz Stacked Power Amplifier with 20.7-dBm Output P1dB in 28-nm Bulk CMOS
”
,
IEEE Solid-State Circuits Letters
, vol. 3, pp. 170-173, 2020.
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2021
D. Manente
,
Quadrelli, F.
,
Padovan, F.
,
Bassi, M.
,
Mazzanti, A.
, and
Bevilacqua, A.
,
“
A 22–31 GHz Bidirectional 5G Transceiver Front-End in 28 nm CMOS
”
, in
ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC)
, 2021.
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2023
D. Manente
,
Quadrelli, F.
,
Padovan, F.
,
Bassi, M.
,
Mazzanti, A.
, and
Bevilacqua, A.
,
“
A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 70, pp. 607-617, 2023.
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Recent Publications
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs
On the Benefits of the Common-Mode Resonance On the 1/f2 Phase Noise Sideband
Analysis and Design of Reactive Passive Mixers for High-Order Modulation IoT Cartesian Transmitters
A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner
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