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Book
A. Gerosa, Elettronica Digitale, Esercizi risolti. PADOVA: Edizioni Libreria Progetto, 2006, pp. 1–216.
A. Gerosa, Elettronica Digitale, Esercizi Risolti. PADOVA – ITA: Libreria Progetto, 2004, pp. 1–161.
Conference Paper
S. Dal Toso, Bevilacqua, A., Tiebout, M., Da Dalt, N., Gerosa, A., and Neviani, A., A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOS, in Proceedings of ESSCIRC 2009, 2009, pp. 444 -447.
A. Bevilacqua, Vallese, A., Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., A 0.13 um CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers, in Digest of Technical Papers of 2007 IEEE International Solid-State Circuits Conference, 2007, pp. 420 -612.
A. Gerosa, Soldan, M., Bevilacqua, A., and Neviani, A., A 0.18-um CMOS Squarer Circuit for a Non-Coherent UWB Receiver, in IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007, 2007, pp. 421 -424.
D. Vogrig, Gerosa, A., Neviani, A., Graell i Amat, A., Montorsi, G., and Benedetto, S., A 0.35 um CMOS analog turbo decoder for a 40 bit, rate 1/3, UMTS channel code, in Research in Microelectronics and Electronics, 2005 PhD, 2005, vol. 1, pp. 31 - 34 vol.1.
A. Bevilacqua, Maniero, A., Gerosa, A., and Neviani, A., A 0.35 um SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection, in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06. , 2006, pp. 1015 -1018.
A. Bevilacqua, Pavan, F. P., Sandner, C., Gerosa, A., and Neviani, A., A 3.4-7 GHz Transformer-Based Dual-mode Wideband VCO, in Proceedings of the 32nd European Solid-State Circuits Conference, 2006, pp. 440 -443.
A. Bevilacqua, Lorenzon, L., Da Dalt, N., Gerosa, A., and Neviani, A., A 4.1 to 5.1 GHz 430 uA injection-locked frequency divider by 7 in 65 nm CMOS, in Proceedings of the ESSCIRC 2010, 2010, pp. 150 -153.
S. Soldà, Caruso, M., Bevilacqua, A., Gerosa, A., Vogrig, D., and Neviani, A., A 5Mb/s UWB-IR CMOS transceiver with a 186 pJ/b and 150 pJ/b TX/RX energy request, in Proceedings of the ESSCIRC 2010, 2010, pp. 498 -501.
A. Bevilacqua, Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., A 6-9-GHz programmable gain LNA with integrated balun in 90-nm CMOS, in IEEE International Conference on Ultra-Wideband, 2008. ICUWB 2008. , 2008, vol. 1, pp. 25 -28.
A. Xotta, Vogrig, D., Gerosa, A., Neviani, A., Graell i Amat, A., Montorsi, G., Bruccoleri, M., and Betti, G., An all-analog CMOS implementation of a turbo decoder for hard-disk drive read channels, in Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on, 2002, vol. 5, p. V-69 - V-72 vol.5.
M. PERENZONI, Gerosa, A., and Neviani, A., Analog CMOS Implementation of Gallager’s Interative Decoding algorithm applied to a Block Turbo Code, in ISCAS, 2003, vol. 5, pp. 813–816.
S. Soldà, Vogrig, D., Bevilacqua, A., Gerosa, A., and Neviani, A., Analog decoding of trellis coded modulation for multi-level flash memories, in IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008., 2008, pp. 744 -747.
A. Gerosa, Novo, A., and Neviani, A., An analog front-end for the acquisition of biomedical signals, fully integrated in a 0.8 um CMOS process, in Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on, 2001, pp. 152 -157.
A. Vallese, Bevilacqua, A., Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., An analog front-end with integrated notch filter for 3-5 GHz UWB receivers in 0.13 um CMOS, in Proc. of IEEE 2007 European Solid State Circuits Conference, 2007, pp. 139 -142.
A. G. I. Amatt, Benedetto, S., Montorsi, G., Vogrig, D., Neviani, A., and Gerosa, A., An analog turbo decoder for the rate-1/3, 40 bit, UMTS turbo code, in Communications, 2005. ICC 2005. 2005 IEEE International Conference on, 2005, vol. 1, pp. 663 - 667 Vol. 1.
A. Graell i Amat, Montorsi, G., Benedetto, S., Vogrig, D., Neviani, A., and Gerosa, A., An analog turbo decoder for the UMTS standard, in Information Theory, 2004. ISIT 2004. Proceedings. International Symposium on, 2004, p. 296.
A. Novo, Gerosa, A., Neviani, A., Mozzi, A., and Zanoni, E., A CMOS 0.8 um programmable charge pump for the output stage of an implantable pacemaker, in Devices, Circuits and Systems, 2000. Proceedings of the 2000 Third IEEE International Caracas Conference on, 2000, pp. 34/1 -34/5.
A. Graell i Amat, Vogrig, D., Benedetto, S., Montorsi, G., Neviani, A., and Gerosa, A., CTH08-3: Reconfigurable Analog Decoder for a Serially Concatenated Convolutional Code, in Global Telecommunications Conference, 2006. GLOBECOM '06. IEEE, 2006, pp. 1 -6.
A. Bevilacqua, Camponeschi, M., Tiebout, M., Gerosa, A., and Neviani, A., Design of broadband inductorless LNAs in ultra-scaled CMOS technologies, in IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008. , 2008, pp. 1300 -1303.
A. Gerosa, Soldà, S., Bevilacqua, A., Vogrig, D., and Neviani, A., A digitally programmable ring oscillator in the UWB range, in Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS),, 2010, pp. 1101 -1104.
A. Gerosa, Costa, M. D., Bevilacqua, A., Vogrig, D., and Neviani, A., An energy-detector for non-coherent impulse-radio UWB receivers, in IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008, 2008, pp. 2705 -2708.
A. Gerosa and Mian, G. A., An Equalizer for Hard Disk Drive Channels, with Low Sensitivity to Sampling Phase Variation, in EUSIPCO-98, 1998, vol. 1, pp. 483–486.
A. Gerosa, Bernardini, R., and Pietri, S., A fully integrated 8-bit, 20 MHz, truly random numbers generator, based on a chaotic system, in Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on, 2001, pp. 87 -92.

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