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Bevilacqua, A.
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2009
S. Dal Toso
,
Bevilacqua, A.
,
Tiebout, M.
,
Da Dalt, N.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOS
”
, in
Proceedings of ESSCIRC 2009
, 2009, pp. 444 -447.
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2010
S. Dal Toso
,
Bevilacqua, A.
,
Tiebout, M.
,
Da Dalt, N.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.06 mm2 11 mW Local Oscillator for the GSM Standard in 65 nm CMOS
”
,
IEEE Journal of Solid-State Circuits
, vol. 45, pp. 1295 -1304, 2010.
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2007
A. Bevilacqua
,
Vallese, A.
,
Sandner, C.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.13 um CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers
”
, in
Digest of Technical Papers of 2007 IEEE International Solid-State Circuits Conference
, 2007, pp. 420 -612.
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A. Gerosa
,
Soldan, M.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
A 0.18-um CMOS Squarer Circuit for a Non-Coherent UWB Receiver
”
, in
IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007
, 2007, pp. 421 -424.
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2006
A. Bevilacqua
,
Maniero, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A 0.35 um SiGe Low-Noise Amplifier for UWB, Receivers with Integrated Interferer Rejection
”
, in
13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06.
, 2006, pp. 1015 -1018.
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2021
L. Tomasin
,
Boi, G.
,
Padovan, F.
, and
Bevilacqua, A.
,
“
A 10.7–14.1 GHz Reconfigurable Octacore DCO with −126 dBc/Hz Phase Noise at 1 MHz offset in 28 nm CMOS
”
, in
2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
, 2021.
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2019
A. Bilato
,
Issakov, V.
, and
Bevilacqua, A.
,
“
A 114-126 GHz Frequency Quintupler with >36 dBc Harmonic Rejection in 0.13 μm SiGe BiCMOS
”
, in
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)
, 2019.
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2017
A. Passamani
,
Ponton, D.
,
Thaller, E.
,
Knoblinger, G.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 1.1V 28.6dBm fully integrated digital power amplifier for mobile and wireless applications in 28nm CMOS technology with 35% PAE
”
, in
2017 IEEE International Solid-State Circuits Conference (ISSCC)
, 2017, pp. 232-233.
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2016
F. Padovan
,
Tiebout, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 12 GHz 22 dB-Gain-Control SiGe Bipolar VGA With 2° Phase-Shift Variation
”
,
IEEE Journal of Solid-State Circuits
, vol. 51, pp. 1525-1536, 2016.
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2015
F. Padovan
,
Tiebout, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 12GHz 22dB-gain-control SiGe bipolar VGA with 2° phase shift variation
”
, in
European Solid-State Circuits Conference (ESSCIRC), ESSCIRC 2015 - 41st
, 2015, pp. 56-59.
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2022
L. Tomasin
,
Andreani, P.
,
Boi, G.
,
Padovan, F.
, and
Bevilacqua, A.
,
“
A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
”
,
IEEE Journal of Solid-State Circuits
, vol. 57, pp. 2802-2811, 2022.
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2019
A. Gatti
,
Spiazzi, G.
,
Gerosa, A.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 130-nm CMOS Dual Input-Polarity DC–DC Converter for Low-Power Applications
”
,
IEEE Solid-State Circuits Letters
, vol. 2, pp. 211-214, 2019.
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2016
F. Padovan
,
Tiebout, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 15.5-39GHz BiCMOS VGA with phase shift compensation for 5G mobile communication transceivers
”
, in
ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference
, 2016, pp. 363-366.
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2019
S. Veni
,
Caruso, M.
,
Tiebout, M.
, and
Bevilacqua, A.
,
“
A 17 GHz All-npn Push-Pull Class-C VCO
”
, in
2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS)
, 2019.
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2012
M. Bassi
,
Caruso, M.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
A 1.75–15 GHz Stepped Frequency Receiver for Breast Cancer Imaging in 65nm CMOS
”
, in
Proc. of the IEEE European Solid-State Circuits Conference
, 2012, pp. 353–356.
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2019
F. Quadrelli
,
Panazzolo, F.
,
Tiebout, M.
,
Padovan, F.
,
Bassi, M.
, and
Bevilacqua, A.
,
“
A 18.2-29.3 GHz Colpitts VCOs bank with -119.5 dBc/Hz Phase Noise at 1 MHz Offset for 5G Communications
”
, in
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
, 2019.
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A. Franceschin
,
Andreani, P.
,
Padovan, F.
,
Bassi, M.
,
Nonis, R.
, and
Bevilacqua, A.
,
“
A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion
”
, in
ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)
, 2019.
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2020
A. Franceschin
,
Andreani, P.
,
Padovan, F.
,
Bassi, M.
, and
Bevilacqua, A.
,
“
A 19.5-GHz 28-nm Class-C CMOS VCO, With a Reasonably Rigorous Result on 1/f Noise Upconversion Caused by Short-Channel Effects
”
,
IEEE Journal of Solid-State Circuits
, vol. 55, pp. 1842-1853, 2020.
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2021
A. Franceschin
,
Quadrelli, F.
,
Padovan, F.
,
Bassi, M.
,
Mazzanti, A.
, and
Bevilacqua, A.
,
“
A 20-GHz Class-C VCO With 80-GHz Fourth-Harmonic Output in 28-nm CMOS
”
,
IEEE Microwave and Wireless Components Letters
, vol. 31, pp. 1154-1157, 2021.
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2014
F. Padovan
,
Bevilacqua, A.
, and
Neviani, A.
,
“
A 20Mb/s, 2.76 pJ/b UWB impulse radio TX with 11.7% efficiency in 130 nm CMOS
”
, in
European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th
, 2014, pp. 287-290.
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2015
M. Caruso
,
Bassi, M.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
A 2-16 GHz 65 nm CMOS Stepped-Frequency Radar Transmitter With Harmonic Rejection for High-Resolution Medical Imaging Applications
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 62, pp. 413-422, 2015.
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2013
M. Caruso
,
Bassi, M.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
A 2-16GHz 204mW 3mm-Resolution Stepped Frequency Radar for Breast Cancer Diagnostic Imaging in 65nm CMOS
”
, in
IEEE ISSCC Digest of Technical Papers
, 2013, pp. 204-241.
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2017
F. Boscolo
,
Padovan, F.
,
Quadrelli, F.
,
Tiebout, M.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A 21GHz 20.5%-tuning range Colpitts VCO with -119 dBc/Hz phase noise at 1MHz offset
”
, in
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
, 2017, pp. 91-94.
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2021
D. Manente
,
Quadrelli, F.
,
Padovan, F.
,
Bassi, M.
,
Mazzanti, A.
, and
Bevilacqua, A.
,
“
A 22–31 GHz Bidirectional 5G Transceiver Front-End in 28 nm CMOS
”
, in
ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC)
, 2021.
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2022
A. Iesurum
,
Manente, D.
,
Padovan, F.
,
Bassi, M.
, and
Bevilacqua, A.
,
“
A 24 GHz Quadrature VCO Based on Coupled PLL with -134 dBc/Hz Phase Noise at 10 MHz Offset in 28 nm CMOS
”
, in
ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC)
, 2022.
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