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Integrated Circuits for Analog and RF µ-Systems
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Recent Publications
Analysis of a Split-Constant-Slope Digital-to-Time Converter Topology
Analysis of CMRR in Doubly-Tuned Transformer Baluns
On the Benefits of the Common-Mode Resonance on the 1/f ² Phase Noise Sideband
A 48-58GHz Frac-N DPLL achieving 137fs integrated jitter and fast locking time below 1μs
A Stacking Technique for High-Swing Low-Phase Noise Class-C Oscillators Using Core Devices in Ultrascaled CMOS Technologies
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