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F. Buccoleri, Dartizio, S. M., Tesolin, F., Avallone, L., Santiccioli, A., Iesurum, A., Steffan, G., Cherniak, D., Bertulessi, L., Bevilacqua, A., Samori, C., Lacaita, A. L., and Levantino, S., A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner, IEEE Journal of Solid-State Circuits, vol. 58, pp. 634-646, 2023.
F. Buccoleri, Dartizio, S. M., Tesolin, F., Avallone, L., Santiccioli, A., Lesurum, A., Steffan, G., Bevilacqua, A., Bertulessi, L., Cherniak, D., Samori, C., Lacaita, A. L., and Levantino, S., A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler, in 2022 IEEE Custom Integrated Circuits Conference (CICC), 2022.
S. Brenna, Padovan, F., Neviani, A., Bevilacqua, A., Bonfanti, A., and Lacaita, A. L., A 64-Channel 965-uW Neural Recording SoC With UWB Wireless Transmission in 130-nm CMOS, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, pp. 528-532, 2016.
F. Boscolo, Padovan, F., Quadrelli, F., Tiebout, M., Neviani, A., and Bevilacqua, A., A 21GHz 20.5%-tuning range Colpitts VCO with -119 dBc/Hz phase noise at 1MHz offset, in ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference, 2017, pp. 91-94.
J. Borremans, Bevilacqua, A., Bronckers, S., Dehan, M., Kuijk, M., Wambacq, P., and Craninckx, J., A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS, IEEE Journal of Solid-State Circuits, vol. 43, pp. 2693 -2705, 2008.
A. Bilato, Issakov, V., and Bevilacqua, A., Considerations on 120GHz LO Signal Generation and Distribution for Highly-Integrated Multi-Channel Radar Transceivers, in 2019 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS), 2019.
A. Bilato, Issakov, V., and Bevilacqua, A., A 114-126 GHz Frequency Quintupler with >36 dBc Harmonic Rejection in 0.13 μm SiGe BiCMOS, in 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019.
A. Bilato, Issakov, V., Mazzanti, A., and Bevilacqua, A., A Multichannel D-Band Radar Receiver With Optimized LO Distribution, IEEE Solid-State Circuits Letters, vol. 4, pp. 141-144, 2021.
A. Bevilacqua, Maniero, A., Gerosa, A., and Neviani, A., An Integrated Solution for Suppressing WLAN Signals in UWB Receivers, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54, pp. 1617 -1625, 2007.
A. Bevilacqua and Andreani, P., Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 59, pp. 20 -24, 2012.
A. Bevilacqua and Neviani, A., Energy-efficient ultra-wideband impulse radios for short-range low-data rate communications, in 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2014, pp. 874-877.
A. Bevilacqua, Camponeschi, M., Tiebout, M., Gerosa, A., and Neviani, A., Design of broadband inductorless LNAs in ultra-scaled CMOS technologies, in IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008. , 2008, pp. 1300 -1303.
A. Bevilacqua and Mazzanti, A., Doubly-Tuned Transformer Networks: A Tutorial, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, pp. 550-555, 2021.
A. Bevilacqua and Niknejad, A. M., An ultra-wideband CMOS LNA for 3.1 to 10.6 GHz wireless receivers, in Digest of Technical Papers of 2004 IEEE International Solid-State Circuits Conference, 2004, pp. 382 - 533 Vol.1.
A. Bevilacqua and Andreani, P., A 2.7–6.1 GHz CMOS local oscillator based on frequency multiplication by 3/2, ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, pp. 1–10, 2012.
A. Bevilacqua, Vallese, A., Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., A 0.13 um CMOS LNA with Integrated Balun and Notch Filter for 3-to-5GHz UWB Receivers, in Digest of Technical Papers of 2007 IEEE International Solid-State Circuits Conference, 2007, pp. 420 -612.
A. Bevilacqua and Andreani, P., On the bias noise to phase noise conversion in harmonic oscillators using Groszkowski theory, in 2011 IEEE International Symposium on Circuits and Systems (ISCAS), 2011, pp. 217 -220.
A. Bevilacqua, Great lessons from the back of the envelope, IEEE Solid-State Circuits Magazine, vol. 6, pp. 45-45, 2014.
A. Bevilacqua, Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., A 6-9-GHz programmable gain LNA with integrated balun in 90-nm CMOS, in IEEE International Conference on Ultra-Wideband, 2008. ICUWB 2008. , 2008, vol. 1, pp. 25 -28.
A. Bevilacqua, Fundamentals of Integrated Transformers: From Principles to Applications, IEEE Solid-State Circuits Magazine, vol. 12, pp. 86-100, 2020.
A. Bevilacqua and Svelto, F., Statistical analysis of second-order intermodulation distortion in WCDMA direct conversion receivers, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 52, pp. 117 - 121, 2005.
A. Bevilacqua, Pavan, F. P., Sandner, C., Gerosa, A., and Neviani, A., Transformer-Based Dual-Mode Voltage-Controlled Oscillators, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 54, pp. 293 -297, 2007.
A. Bevilacqua, Lorenzon, L., Da Dalt, N., Gerosa, A., and Neviani, A., A 4.1 to 5.1 GHz 430 uA injection-locked frequency divider by 7 in 65 nm CMOS, in Proceedings of the ESSCIRC 2010, 2010, pp. 150 -153.
A. Bevilacqua, Sandner, C., Gerosa, A., and Neviani, A., A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers, IEEE Microwave and Wireless Components Letters, vol. 16, pp. 134 -136, 2006.
A. Bevilacqua and Andreani, P., An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators, Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 59, pp. 938 -945, 2012.

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