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Author Title Type [ Year(Desc)]
2024
L. Grimaldi, Iesurum, A., Boi, G., Versolatto, F., Steffan, G., Padovan, F., Koltsov, H., Bevilacqua, A., and Cherniak, D., A 48-58GHz Frac-N DPLL achieving 137fs integrated jitter and fast locking time below 1μs, in 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), 2024.
A. Iesurum, Manente, D., Padovan, F., Bassi, M., and Bevilacqua, A., Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs, IEEE Journal of Solid-State Circuits, vol. 59, pp. 294-306, 2024.
L. Tomasin, Vogrig, D., Neviani, A., and Bevilacqua, A., Analysis and Design of Reactive Passive Mixers for High-Order Modulation IoT Cartesian Transmitters, IEEE Transactions on Microwave Theory and Techniques, vol. 72, pp. 2840-2851, 2024.
N. Zugno and Bevilacqua, A., Analysis of a Split-Constant-Slope Digital-to-Time Converter Topology, in 2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2024.
A. Bevilacqua and Mazzanti, A., Analysis of CMRR in Doubly-Tuned Transformer Baluns, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, pp. 4874-4878, 2024.
L. Bellemo and Bevilacqua, A., On the Benefits of the Common-Mode Resonance on the 1/f ² Phase Noise Sideband, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, pp. 3715-3719, 2024.
E. Baiesi Fietta, Seebacher, D., Ponton, D., and Bevilacqua, A., On the Efficiency Enhancement of Voltage Mode Digital Doherty Power Amplifiers, in 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024.
D. Pecile, Kokorovic, S., Gambarucci, A., and Bevilacqua, A., On the Efficiency of Output-Matched Radiofrequency Power Amplifiers, in 2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2024.
L. Bellemo, Spiazzi, G., and Bevilacqua, A., On the Optimal Design of Integrated AC-DC Converters for Energy Harvesting, in 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024.
L. Tomasin, Iesurum, A., Gobbo, A., Neviani, A., and Bevilacqua, A., A Stacking Technique for High-Swing Low-Phase Noise Class-C Oscillators Using Core Devices in Ultrascaled CMOS Technologies, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, pp. 4718-4722, 2024.

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