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Biblio
] , “Low-power sensing and digitization of cardiac signals based on sigma-delta conversion”, in Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on, 2000, pp. 216 - 218.
, “2D video rate SC FIR filters based on analog RAMs”, Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 46, pp. 1348 -1360, 1999.
, “A low complexity EPR-IV equalizer for hard disk read channels”, in Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on, 1999, vol. 2, pp. 1069 -1072 vol.2.
, “A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters”, in Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on, 1999, pp. 195 -198.
, “Programmable voltage multiplier for pacemaker output pulse generation”, Electronics Letters, vol. 35, pp. 560 -561, 1999.
, “Programmable voltage multipliers for pacemaker output pulse generation in CMOS 0.8 um technology”, in Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European, 1999, pp. 386 - 389.
, “A SC Video Filter with Analog-RAM-based Delay Efficient Realization”, in ECCTD, 1999, vol. 2, pp. 1247–1250.
, “Test structures and testing methods for electrostatic discharge: results of PROPHECY project”, MICROELECTRONICS RELIABILITY, vol. 39, pp. 635–646, 1999.
, “An Equalizer for Hard Disk Drive Channels, with Low Sensitivity to Sampling Phase Variation”, in EUSIPCO-98, 1998, vol. 1, pp. 483–486.
, “A New Structure for Video-Rate 2D SC FIR Filters”, in EUSIPCO-96, 1996, vol. 2, pp. 1307–1310.