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Author Title [ Type(Desc)] Year
Journal Article
A. Iesurum, Manente, D., Padovan, F., Bassi, M., and Bevilacqua, A., Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs, IEEE Journal of Solid-State Circuits, vol. 59, pp. 294-306, 2024.
A. Passamani, Ponton, D., Knoblinger, G., and Bevilacqua, A., Analysis and design of power and efficiency in third-order matching networks for switched-capacitor power-amplifiers, Analog Integrated Circuits and Signal Processing, vol. 89, no. 2, pp. 307-315, 2016.
L. Tomasin, Vogrig, D., Neviani, A., and Bevilacqua, A., Analysis and Design of Reactive Passive Mixers for High-Order Modulation IoT Cartesian Transmitters, IEEE Transactions on Microwave Theory and Techniques, pp. 1-12, 2023.
A. Bevilacqua and Andreani, P., An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators, Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 59, pp. 938 -945, 2012.
F. Quadrelli, Manente, D., Seebacher, D., Padovan, F., Bassi, M., Mazzanti, A., and Bevilacqua, A., A Broadband 22-31-GHz Bidirectional Image-Reject Up/Down Converter Module in 28-nm CMOS for 5G Communications, IEEE Journal of Solid-State Circuits, vol. 57, pp. 1968-1981, 2022.
P. Scaramuzza, Rubino, C., Caruso, M., Tiebout, M., Bevilacqua, A., and Neviani, A., Class-J SiGe X-Band Power Amplifier Using a Ladder Filter-Based AM-PM Distortion Reduction Technique, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 65, no. 11, pp. 3780 - 3789, 2018.
A. Xotta, Gerosa, A., and Neviani, A., CMOS implementation of all-analogue APP decoders: analysis of performances and limitations, Electronics Letters, vol. 37, pp. 1501 -1503, 2001.
N. Modolo, De Santi, C., Baratella, G., Bettini, A., Borga, M., Posthuma, N., Bakeroot, B., You, S., Decoutere, S., Bevilacqua, A., Neviani, A., MENEGHESSO, G., Zanoni, E., and Meneghini, M., Compact Modeling of Nonideal Trapping/Detrapping Processes in GaN Power Devices, IEEE Transactions on Electron Devices, pp. 1-6, 2022.
J. Borremans, Bevilacqua, A., Bronckers, S., Dehan, M., Kuijk, M., Wambacq, P., and Craninckx, J., A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS, IEEE Journal of Solid-State Circuits, vol. 43, pp. 2693 -2705, 2008.
D. Manente, Quadrelli, F., Padovan, F., Bassi, M., Mazzanti, A., and Bevilacqua, A., A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, pp. 607-617, 2023.
M. Ruzzarin, Meneghini, M., de Santi, C., Neviani, A., Yu, F., Strempel, K., Fatahilah, M. Fahlesa, Witzigmann, B., Wasisto, H. Suryo, Waag, A., Meneghesso, G., and Zanoni, E., Demonstration of UV-Induced Threshold Voltage Instabilities in Vertical GaN Nanowire Array-Based Transistors, IEEE Transactions on Electron Devices, vol. 66, pp. 2119-2124, 2019.
F. Padovan, Tiebout, M., Mertens, K. L. R., Bevilacqua, A., and Neviani, A., Design of Low-Noise K -Band SiGe Bipolar VCOs: Theory and Implementation, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 607-615, 2015.
A. Graell i Amat, Benedetto, S., Montorsi, G., Vogrig, D., Neviani, A., and Gerosa, A., Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code, Communications, IEEE Transactions on, vol. 54, pp. 1973 -1982, 2006.
A. Bevilacqua and Mazzanti, A., Doubly-Tuned Transformer Networks: A Tutorial, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, pp. 550-555, 2021.
A. Gerosa, Soldà, S., Bevilacqua, A., Vogrig, D., and Neviani, A., An Energy-Detector for Noncoherent Impulse-Radio UWB Receivers, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 56, pp. 1030 -1040, 2009.
A. Gerosa and Neviani, A., Enhancing Output Voltage Swing in Low-Voltage Micro-Power OTA Using Self-Cascode, ELECTRONICS LETTERS, vol. 39, pp. 638–639, 2003.
S. M. Dartizio, Buccoleri, F., Tesolin, F., Avallone, L., Santiccioli, A., Iesurum, A., Steffan, G., Cherniak, D., Bertulessi, L., Bevilacqua, A., Samori, C., Lacaita, A. L., and Levantino, S., A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μ s-Locking-Time, IEEE Journal of Solid-State Circuits, pp. 1-14, 2022.
A. Gerosa, Xotta, A., Neviani, A., and Mian, G. A., Frequency Offset Compensation in Fractionally Spaced Equalization, IEE PROCEEDINGS. CIRCUITS, DEVICES AND SYSTEMS, vol. 150, pp. 134–140, 2003.
A. Gerosa, Bernardini, R., and Pietri, S., A Fully Integrated Chaotic System for the Generation of Truly Random Numbers, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. FUNDAMENTAL THEORY AND APPLICATIONS, vol. 49, pp. 993–1000, 2002.
A. Bevilacqua, Sandner, C., Gerosa, A., and Neviani, A., A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers, IEEE Microwave and Wireless Components Letters, vol. 16, pp. 134 -136, 2006.
A. Gerosa, Maniero, A., and Neviani, A., A Fully-Integrated Dual-Channel Log-Domain Programmable Preamplifier and Filter for an Implantable Cardiac Pacemakers, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, vol. 51, pp. 1916–1925, 2004.
A. Gerosa, Neviani, A., and Maniero, A., A Fully-Integrated Two-Channel A/D Interface for the Acquisition of Cardiac Signals in Implantable Pacemakers, IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 39, pp. 1083–1093, 2004.
A. Bevilacqua, Fundamentals of Integrated Transformers: From Principles to Applications, IEEE Solid-State Circuits Magazine, vol. 12, pp. 86-100, 2020.
C. Shi, Song, M., Gao, Z., Bevilacqua, A., Dolmans, G., and Liu, Y. - H., Galvanic-Coupled Trans-Dural Data Transfer for High-Bandwidth Intracortical Neural Sensing, IEEE Transactions on Microwave Theory and Techniques, vol. 70, pp. 4579-4589, 2022.
A. Bevilacqua, Great lessons from the back of the envelope, IEEE Solid-State Circuits Magazine, vol. 6, pp. 45-45, 2014.

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