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G. M. Cortelazzo, Malavasi, E., Gerosa, A., and Neviani, A., A New Structure for Video-Rate 2D SC FIR Filters, in EUSIPCO-96, 1996, vol. 2, pp. 1307–1310.
G. Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., Non-isolated high step-up DC-DC converter with minimum switch voltage stress, in 2017 IEEE Southern Power Electronics Conference (SPEC), 2017.
G. Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., Non-isolated High Step-up DC-DC Converter with Minimum Switch Voltage Stress, IEEE Transactions on Power Electronics, vol. 34, no. 2, pp. 1470-1480, 2019.
A. Bevilacqua and Svelto, F., Non-linear spectral analysis of direct conversion wireless receivers, in IEEE 2002 Radio and Wireless Conference, 2002, pp. 39 - 42.
A. Gerosa, Neviani, A., Xotta, A., and Mian, G. A., A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization, in Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, 2001, vol. 2, pp. 1099 -1102 vol.2.
S. Marconi, Spiazzi, G., Bevilacqua, A., and Galvano, M., A Novel Integrated Step-Up Hybrid Converter With Wide Conversion Ratio, IEEE Transactions on Power Electronics, vol. 35, pp. 2764-2775, 2020.
P
A. Gerosa, Neviani, A., and Cortelazzo, G. M., A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters, in Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on, 1999, pp. 195 -198.
A. Maniero, Gerosa, A., and Neviani, A., Performance Optimization in Micro-Power, Low-Voltage, Log-Domain Filters in Pure CMOS Technology, in ISCAS, 2003, vol. 1, pp. 565–568.
A. Bevilacqua and Andreani, P., Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 59, pp. 20 -24, 2012.
A. Mazzanti and Bevilacqua, A., On the Phase Noise Performance of Transformer-Based CMOS Differential-Pair Harmonic Oscillators, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 2334-2341, 2015.
A. Novo, Gerosa, A., Neviani, A., Mozzi, A., and Zanoni, E., Programmable voltage multiplier for pacemaker output pulse generation, Electronics Letters, vol. 35, pp. 560 -561, 1999.
A. Novo, Gerosa, A., Neviani, A., Zanoni, E., and Mozzi, A., Programmable voltage multipliers for pacemaker output pulse generation in CMOS 0.8 um technology, in Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European, 1999, pp. 386 - 389.
A. Xotta, Gerosa, A., and Neviani, A., A Programmable-Order Sigma-Delta Converter for a Multi-Standard Wireless Receiver, in WowCas, Vancouver B.C., Canada, 2004, vol. 1, pp. 33–34.

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