You are here

Biblio

Export 199 results:
Author Title [ Type(Asc)] Year
Conference Paper
L. Tomasin, Vogrig, D., Neviani, A., and Bevilacqua, A., A Reactive Passive Mixer for 16-QAM Cartesian IoT Transmitters in 22 nm FD-SOI CMOS, in 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2023.
A. Bevilacqua, Sandner, C., Gerosa, A., and Neviani, A., Quadrature VCOs Based on Coupled PLLs, in IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007, 2007, pp. 2140 -2143.
F. Padovan, Quadrelli, F., Bassi, M., Tiebout, M., and Bevilacqua, A., A quad-core 15GHz BiCMOS VCO with -124dBc/Hz phase noise at 1MHz offset, -189dBc/Hz FOM, and robust to multimode concurrent oscillations, in 2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018.
A. Xotta, Gerosa, A., and Neviani, A., A Programmable-Order Sigma-Delta Converter for a Multi-Standard Wireless Receiver, in WowCas, Vancouver B.C., Canada, 2004, vol. 1, pp. 33–34.
A. Novo, Gerosa, A., Neviani, A., Zanoni, E., and Mozzi, A., Programmable voltage multipliers for pacemaker output pulse generation in CMOS 0.8 um technology, in Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European, 1999, pp. 386 - 389.
A. Maniero, Gerosa, A., and Neviani, A., Performance Optimization in Micro-Power, Low-Voltage, Log-Domain Filters in Pure CMOS Technology, in ISCAS, 2003, vol. 1, pp. 565–568.
A. Gerosa, Neviani, A., and Cortelazzo, G. M., A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters, in Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on, 1999, pp. 195 -198.
G. Marin, Cherniak, K., Subotskaya, V., Bodano, E., Sandner, C., and Bevilacqua, A., Optimized Driver Design for Integrated Reconfigurable Switched Capacitor Converters, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.
A. Celin and Gerosa, A., Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs, in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 1454-1457.
L. Bellemo, Spiazzi, G., and Bevilacqua, A., On the Optimal Design of Integrated AC-DC Converters for Energy Harvesting, in 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024.
A. Gerosa, Bevilacqua, A., Neviani, A., and Xotta, A., An optimal architecture for a multimode ADC, based on the cascade of a Sigma-Delta modulator and a flash converter, in Proceedings of 2006 IEEE International Symposium on Circuits and Systems, 2006, p. 4 pp.
A. Gerosa, Neviani, A., Xotta, A., and Mian, G. A., A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization, in Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, 2001, vol. 2, pp. 1099 -1102 vol.2.
A. Bevilacqua and Svelto, F., Non-linear spectral analysis of direct conversion wireless receivers, in IEEE 2002 Radio and Wireless Conference, 2002, pp. 39 - 42.
G. Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., Non-isolated high step-up DC-DC converter with minimum switch voltage stress, in 2017 IEEE Southern Power Electronics Conference (SPEC), 2017.
G. M. Cortelazzo, Malavasi, E., Gerosa, A., and Neviani, A., A New Structure for Video-Rate 2D SC FIR Filters, in EUSIPCO-96, 1996, vol. 2, pp. 1307–1310.
A. Gerosa, Bevilacqua, A., and Spiazzi, G., A Multi-Phase Self-Reconfigurable Switched-Capacitor DC-DC Step-Up Converter Integrated in CMOS Technology, in 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019.
A. Xotta, Gerosa, A., and Neviani, A., A Multi-Mode Sigma-Delta Analog-to-Digital Converter for GSM, UMTS and WLAN, in ISCAS, 2005.
A. Gerosa, Novo, A., Mengalli, A., and Neviani, A., A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker, in Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, 2001, vol. 1, pp. 296 -299 vol. 1.
A. Maniero, Bevilacqua, A., Gerosa, A., and Neviani, A., A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency, in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06. , 2006, pp. 90 -93.
S. Soldà, Caruso, M., Vogrig, D., Bevilacqua, A., Gerosa, A., and Neviani, A., Low-power UWB transmitter using a combined mixer and power amplifier, in Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on, 2010, pp. 333 -336.
A. Neviani, Bevilacqua, A., Gerosa, A., and Vogrig, D., Low-power ultra-Wide-Band Impulse Radio transceivers for short range communications, in 2012 IEEE International Conference on IC Design Technology (ICICDT), 2012, pp. 1 -4.
A. Gerosa, Novo, A., and Neviani, A., Low-power sensing and digitization of cardiac signals based on sigma-delta conversion, in Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on, 2000, pp. 216 - 218.
A. Gerosa and Neviani, A., A LOW-POWER DECIMATION FILTER FOR A SIGMA-DELTA CONVERTER BASED ON A POWER-OPTMIZED SINC FILTER, in ISCAS, 2004, vol. 2, pp. 245–248.
A. Gerosa and Mian, G. A., A low complexity EPR-IV equalizer for hard disk read channels, in Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on, 1999, vol. 2, pp. 1069 -1072 vol.2.
A. Passamani, Ponton, D., Knoblinger, G., and Bevilacqua, A., A linear model of efficiency for Switched-Capacitor RF Power-Amplifiers, in 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), 2014, pp. 1-4.

Pages