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Author Title [ Type

] Year

Conference Paper

G. Marin, Cherniak, K., Subotskaya, V., Bodano, E., Sandner, C., and Bevilacqua, A., “Optimized Driver Design for Integrated Reconfigurable Switched Capacitor Converters”, in 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020.

A. Celin and Gerosa, A., “Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs”, in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 1454-1457.

L. Bellemo, Spiazzi, G., and Bevilacqua, A., “On the Optimal Design of Integrated AC-DC Converters for Energy Harvesting”, in 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024.

A. Gerosa, Bevilacqua, A., Neviani, A., and Xotta, A., “An optimal architecture for a multimode ADC, based on the cascade of a Sigma-Delta modulator and a flash converter”, in Proceedings of 2006 IEEE International Symposium on Circuits and Systems, 2006, p. 4 pp.

A. Gerosa, Neviani, A., Xotta, A., and Mian, G. A., “A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization”, in Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, 2001, vol. 2, pp. 1099 -1102 vol.2.

A. Bevilacqua and Svelto, F., “Non-linear spectral analysis of direct conversion wireless receivers”, in IEEE 2002 Radio and Wireless Conference, 2002, pp. 39 - 42.

G. Spiazzi, Biadene, D., Marconi, S., and Bevilacqua, A., “Non-isolated high step-up DC-DC converter with minimum switch voltage stress”, in 2017 IEEE Southern Power Electronics Conference (SPEC), 2017.

G. M. Cortelazzo, Malavasi, E., Gerosa, A., and Neviani, A., “A New Structure for Video-Rate 2D SC FIR Filters”, in EUSIPCO-96, 1996, vol. 2, pp. 1307–1310.

A. Gerosa, Bevilacqua, A., and Spiazzi, G., “A Multi-Phase Self-Reconfigurable Switched-Capacitor DC-DC Step-Up Converter Integrated in CMOS Technology”, in 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019.

A. Xotta, Gerosa, A., and Neviani, A., “A Multi-Mode Sigma-Delta Analog-to-Digital Converter for GSM, UMTS and WLAN”, in ISCAS, 2005.

A. Gerosa, Novo, A., Mengalli, A., and Neviani, A., “A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker”, in Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, 2001, vol. 1, pp. 296 -299 vol. 1.

A. Maniero, Bevilacqua, A., Gerosa, A., and Neviani, A., “A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency”, in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06. , 2006, pp. 90 -93.

S. Soldà, Caruso, M., Vogrig, D., Bevilacqua, A., Gerosa, A., and Neviani, A., “Low-power UWB transmitter using a combined mixer and power amplifier”, in Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on, 2010, pp. 333 -336.

A. Neviani, Bevilacqua, A., Gerosa, A., and Vogrig, D., “Low-power ultra-Wide-Band Impulse Radio transceivers for short range communications”, in 2012 IEEE International Conference on IC Design Technology (ICICDT), 2012, pp. 1 -4.

A. Gerosa, Novo, A., and Neviani, A., “Low-power sensing and digitization of cardiac signals based on sigma-delta conversion”, in Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on, 2000, pp. 216 - 218.

A. Gerosa and Neviani, A., “A LOW-POWER DECIMATION FILTER FOR A SIGMA-DELTA CONVERTER BASED ON A POWER-OPTMIZED SINC FILTER”, in ISCAS, 2004, vol. 2, pp. 245–248.

A. Gerosa and Mian, G. A., “A low complexity EPR-IV equalizer for hard disk read channels”, in Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on, 1999, vol. 2, pp. 1069 -1072 vol.2.

A. Passamani, Ponton, D., Knoblinger, G., and Bevilacqua, A., “A linear model of efficiency for Switched-Capacitor RF Power-Amplifiers”, in 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), 2014, pp. 1-4.

F. Padovan, Tiebout, M., Mertens, K., Bevilacqua, A., and Neviani, A., “A K-band SiGe bipolar VCO with transformer-coupled varactor for backhaul links”, in 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF),, 2013, pp. 108-110.

A. Graell i Amat, Vogrig, D., Benedetto, S., Montorsi, G., SOLDA, S., Neviani, A., and Gerosa, A., “Iterative Analog Decoder for a SCCC”, in Analog Decoding Workshop, 2006.

M. Bassi, Bevilacqua, A., Gerosa, A., and Neviani, A., “Integrated Transceivers for UWB Breast Cancer Imaging: Architecture and Circuit Constraints”, in 2011 IEEE International Symposium on Circuits and Systems, 2011, pp. 2087-2090.

G. Marin, Cherniak, K., Subotskaya, V., Bodano, E., Sandner, C., and Bevilacqua, A., “Global Optimization of Reconfigurable Switched Capacitor DC-DC Converters”, in 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019.

F. Chiocchetta, De Santi, C., Rampazzo, F., Mukherjee, K., Grünenpütt, J., Sommer, D., Blanck, H., Lambert, B., Gerosa, A., MENEGHESSO, G., Zanoni, E., and Meneghini, M., “GaN RF HEMT Reliability: Impact of Device Processing on I-V Curve Stability and Current Collapse”, in 2022 IEEE International Reliability Physics Symposium (IRPS), 2022.

A. Gerosa, Maniero, A., and Neviani, A., “A Fully-Integrated Two-Channel A/D Interface for the Acquisition of Cardiac Signals in Implantable Pacemakers”, in ESSCIRC, 2003, vol. 1, pp. 157–160.

A. Gerosa, Bernardini, R., and Pietri, S., “A fully integrated 8-bit, 20 MHz, truly random numbers generator, based on a chaotic system”, in Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on, 2001, pp. 87 -92.

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