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Gerosa, A.
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2015
A. Celin
and
Gerosa, A.
,
“
Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs
”
, in
2015 IEEE International Symposium on Circuits and Systems (ISCAS)
, 2015, pp. 1454-1457.
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D. Vogrig
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A symbol-duty-cycled 440 pJ/b impulse radio receiver with 0.57 aJ sensitivity in 130 nm CMOS
”
, in
Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE
, 2015, pp. 243-246.
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2016
A. Celin
and
Gerosa, A.
,
“
A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior
”
, in
2016 IEEE International Symposium on Circuits and Systems (ISCAS)
, 2016, pp. 702-705.
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2017
D. Vogrig
,
Bevilacqua, A.
,
Gerosa, A.
, and
Neviani, A.
,
“
A Symbol-Duty-Cycled 440-pJ/b Impulse Radio Receiver With 0.57-aJ Sensitivity in 130-nm CMOS
”
,
IEEE Transactions on Microwave Theory and Techniques
, vol. 65, pp. 565-573, 2017.
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