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Title
Type
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Year
]
2008
J. Borremans
,
Bevilacqua, A.
,
Bronckers, S.
,
Dehan, M.
,
Kuijk, M.
,
Wambacq, P.
, and
Craninckx, J.
,
“
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS
”
,
IEEE Journal of Solid-State Circuits
, vol. 43, pp. 2693 -2705, 2008.
DOI
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2023
D. Manente
,
Quadrelli, F.
,
Padovan, F.
,
Bassi, M.
,
Mazzanti, A.
, and
Bevilacqua, A.
,
“
A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 70, pp. 607-617, 2023.
DOI
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2019
A. Bilato
,
Issakov, V.
, and
Bevilacqua, A.
,
“
Considerations on 120GHz LO Signal Generation and Distribution for Highly-Integrated Multi-Channel Radar Transceivers
”
, in
2019 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)
, 2019.
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2006
A. Graell i Amat
,
Vogrig, D.
,
Benedetto, S.
,
Montorsi, G.
,
Neviani, A.
, and
Gerosa, A.
,
“
CTH08-3: Reconfigurable Analog Decoder for a Serially Concatenated Convolutional Code
”
, in
Global Telecommunications Conference, 2006. GLOBECOM '06. IEEE
, 2006, pp. 1 -6.
DOI
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2019
M. Ruzzarin
,
Meneghini, M.
,
de Santi, C.
,
Neviani, A.
,
Yu, F.
,
Strempel, K.
,
Fatahilah, M. Fahlesa
,
Witzigmann, B.
,
Wasisto, H. Suryo
,
Waag, A.
,
Meneghesso, G.
, and
Zanoni, E.
,
“
Demonstration of UV-Induced Threshold Voltage Instabilities in Vertical GaN Nanowire Array-Based Transistors
”
,
IEEE Transactions on Electron Devices
, vol. 66, pp. 2119-2124, 2019.
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2023
N. Zugno
,
Brandonisio, F.
,
Niederfriniger, T.
, and
Bevilacqua, A.
,
“
On the Design Challenges of Class-C Oscillators in Ultra-Scaled CMOS Technologies
”
, in
2023 18th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)
, 2023.
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2018
S. Marconi
,
Barbero, M. B.
,
Fougeron, D.
,
Godiot, S.
,
Menouni, M.
,
Pangaud, P.
,
Rozanov, A.
,
Breugnon, P.
,
Bomben, M.
,
Calderini, G.
,
Crescioli, F.
,
Le Dortz, O.
,
Marchiori, G.
,
Dzahini, D.
,
Rarbi, F. E.
,
Gaglione, R.
,
Krüger, H.
,
Daas, M.
,
Dieter, Y.
,
Hemperek, T.
,
Hügging, F.
,
Moustakas, K.
,
Pohl, D.
,
Rymaszewski, P.
,
Standke, M.
,
Vogt, M.
,
Wang, T.
,
Wermes, N.
,
Karagounis, M.
,
Stiller, A.
,
Marzocca, C.
,
Marzocca, G.
,
De Robertis, G.
,
Loddo, F.
,
Licciulli, F.
,
Andreazza, A.
,
Liberali, V.
,
Stabile, A.
,
Frontini, L.
,
Bagatin, M.
,
Bisello, D.
,
Gerardin, S.
,
Mattiazzo, S.
,
Paccagnella, A.
,
Vogrig, D.
,
Bonaldo, S.
,
Bacchetta, N.
,
Gaioni, L.
,
De Canio, F.
,
Manghisoni, M.
,
Re, V.
,
Riceputi, E.
,
Traversi, G.
,
Ratti, L.
,
Vacchi, C.
,
Androsov, K.
,
Beccherle, R.
,
Magazzu, G.
,
Minuti, M.
,
Morsani, F.
,
Palla, F.
,
Poulios, S.
,
Bilei, G. M.
,
Menichelli, M.
,
Placidi, P.
,
Dellacasa, G.
,
Demaria, N.
,
Mazza, G.
,
Monteil, E.
,
Pacher, L.
,
Paternò, A.
,
Rivetti, A.
,
Rolo, M. D. Da Roch
,
Gajanana, D.
,
Gromov, V.
,
van Eijk, B.
,
Kluit, R.
,
Vitkovskiy, A.
,
Benka, T.
,
Havranek, M.
,
Janoska, Z.
,
Marcisovsky, M.
,
Neue, G.
,
Tomasek, L.
,
Kafka, V.
,
Vrba, V.
,
Lopez-Morillo, E.
,
Palomo, F. R.
,
Muñoz, F.
,
Vila, I.
,
Jiménez, E. M. S.
,
Abbaneo, D.
,
Christiansen, J.
,
Orfanelli, S.
,
Casas, L. M. Jara
,
Conti, E.
,
Bell, S.
,
Prydderch, M. L.
,
Thomas, S.
,
Christian, D. C.
,
Deptuch, G.
,
Fahim, F.
,
Hoff, J.
,
Lipton, R.
,
Liu, T.
,
Zimmerman, T.
,
Miryala, S.
,
Garcia-Sciveres, M.
,
Gnani, D.
,
Krieger, A.
,
Papadopoulou, K.
,
Heim, T.
,
Carney, R.
,
Nachman, B.
,
Renteira, C.
,
Wallangen, V.
,
Hoeferkamp, M.
, and
Seidel, S.
,
“
Design implementation and test results of the RD53A, a 65 nm large scale chip for next generation pixel detectors at the HL-LHC
”
, in
2018 IEEE Nuclear Science Symposium and Medical Imaging Conference Proceedings (NSS/MIC)
, 2018.
DOI
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2008
A. Bevilacqua
,
Camponeschi, M.
,
Tiebout, M.
,
Gerosa, A.
, and
Neviani, A.
,
“
Design of broadband inductorless LNAs in ultra-scaled CMOS technologies
”
, in
IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008.
, 2008, pp. 1300 -1303.
DOI
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2015
F. Padovan
,
Tiebout, M.
,
Mertens, K. L. R.
,
Bevilacqua, A.
, and
Neviani, A.
,
“
Design of Low-Noise K -Band SiGe Bipolar VCOs: Theory and Implementation
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 62, pp. 607-615, 2015.
DOI
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2001
A. Gerosa
,
“
Design of Power-Optimized OTAs for SC Applications
”
. 2001.
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2006
A. Graell i Amat
,
Benedetto, S.
,
Montorsi, G.
,
Vogrig, D.
,
Neviani, A.
, and
Gerosa, A.
,
“
Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code
”
,
Communications, IEEE Transactions on
, vol. 54, pp. 1973 -1982, 2006.
DOI
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2010
A. Gerosa
,
Soldà, S.
,
Bevilacqua, A.
,
Vogrig, D.
, and
Neviani, A.
,
“
A digitally programmable ring oscillator in the UWB range
”
, in
Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS),
, 2010, pp. 1101 -1104.
DOI
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2021
A. Bevilacqua
and
Mazzanti, A.
,
“
Doubly-Tuned Transformer Networks: A Tutorial
”
,
IEEE Transactions on Circuits and Systems II: Express Briefs
, vol. 68, pp. 550-555, 2021.
DOI
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2004
A. Gerosa
,
Elettronica Digitale, Esercizi Risolti
. PADOVA – ITA: Libreria Progetto, 2004, pp. 1–161.
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2006
A. Gerosa
,
Elettronica Digitale, Esercizi risolti
. PADOVA: Edizioni Libreria Progetto, 2006, pp. 1–216.
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2009
A. Gerosa
,
Soldà, S.
,
Bevilacqua, A.
,
Vogrig, D.
, and
Neviani, A.
,
“
An Energy-Detector for Noncoherent Impulse-Radio UWB Receivers
”
,
IEEE Transactions on Circuits and Systems I: Regular Papers
, vol. 56, pp. 1030 -1040, 2009.
DOI
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2008
A. Gerosa
,
Costa, M. D.
,
Bevilacqua, A.
,
Vogrig, D.
, and
Neviani, A.
,
“
An energy-detector for non-coherent impulse-radio UWB receivers
”
, in
IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008
, 2008, pp. 2705 -2708.
DOI
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2014
A. Bevilacqua
and
Neviani, A.
,
“
Energy-efficient ultra-wideband impulse radios for short-range low-data rate communications
”
, in
2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)
, 2014, pp. 874-877.
DOI
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2003
A. Gerosa
and
Neviani, A.
,
“
Enhancing Output Voltage Swing in Low-Voltage Micro-Power OTA Using Self-Cascode
”
,
ELECTRONICS LETTERS
, vol. 39, pp. 638–639, 2003.
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1998
A. Gerosa
and
Mian, G. A.
,
“
An Equalizer for Hard Disk Drive Channels, with Low Sensitivity to Sampling Phase Variation
”
, in
EUSIPCO-98
, 1998, vol. 1, pp. 483–486.
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2022
S. M. Dartizio
,
Buccoleri, F.
,
Tesolin, F.
,
Avallone, L.
,
Santiccioli, A.
,
Iesurum, A.
,
Steffan, G.
,
Cherniak, D.
,
Bertulessi, L.
,
Bevilacqua, A.
,
Samori, C.
,
Lacaita, A. L.
, and
Levantino, S.
,
“
A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μ s-Locking-Time
”
,
IEEE Journal of Solid-State Circuits
, pp. 1-14, 2022.
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2003
A. Gerosa
,
Xotta, A.
,
Neviani, A.
, and
Mian, G. A.
,
“
Frequency Offset Compensation in Fractionally Spaced Equalization
”
,
IEE PROCEEDINGS. CIRCUITS, DEVICES AND SYSTEMS
, vol. 150, pp. 134–140, 2003.
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2021
S. Veni
,
Caruso, M.
,
Seebacher, D.
,
Neviani, A.
, and
Bevilacqua, A.
,
“
A Fully Integrated 28 GHz Class-J Doherty Power Amplifier in 130 nm BiCMOS
”
, in
SMACD / PRIME 2021; International Conference on SMACD and 16th Conference on PRIME
, 2021.
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2001
A. Gerosa
,
Bernardini, R.
, and
Pietri, S.
,
“
A fully integrated 8-bit, 20 MHz, truly random numbers generator, based on a chaotic system
”
, in
Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on
, 2001, pp. 87 -92.
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2002
A. Gerosa
,
Bernardini, R.
, and
Pietri, S.
,
“
A Fully Integrated Chaotic System for the Generation of Truly Random Numbers
”
,
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. FUNDAMENTAL THEORY AND APPLICATIONS
, vol. 49, pp. 993–1000, 2002.
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Recent Publications
Analysis and Design of Coupled PLL-Based CMOS Quadrature VCOs
On the Benefits of the Common-Mode Resonance On the 1/f2 Phase Noise Sideband
A Compensation and Calibration Technique for Lumped Hybrid Couplers in Integrated Image-Reject Architectures
A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner
On the Design Challenges of Class-C Oscillators in Ultra-Scaled CMOS Technologies
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