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Export 130 results:
Author Title Type [ Year(Asc)]
2013
F. Padovan, Tiebout, M., Mertens, K., Bevilacqua, A., and Neviani, A., A K-band SiGe bipolar VCO with transformer-coupled varactor for backhaul links, in 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF),, 2013, pp. 108-110.
2014
A. Passamani, Ponton, D., Knoblinger, G., and Bevilacqua, A., A linear model of efficiency for Switched-Capacitor RF Power-Amplifiers, in 2014 10th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), 2014, pp. 1-4.
1999
A. Gerosa and Mian, G. A., A low complexity EPR-IV equalizer for hard disk read channels, in Electronics, Circuits and Systems, 1999. Proceedings of ICECS '99. The 6th IEEE International Conference on, 1999, vol. 2, pp. 1069 -1072 vol.2.
2000
A. Gerosa, Novo, A., and Neviani, A., Low-power sensing and digitization of cardiac signals based on sigma-delta conversion, in Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on, 2000, pp. 216 - 218.
2010
S. Soldà, Caruso, M., Vogrig, D., Bevilacqua, A., Gerosa, A., and Neviani, A., Low-power UWB transmitter using a combined mixer and power amplifier, in Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on, 2010, pp. 333 -336.
2006
A. Maniero, Bevilacqua, A., Gerosa, A., and Neviani, A., A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency, in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06. , 2006, pp. 90 -93.
2001
A. Gerosa, Novo, A., Mengalli, A., and Neviani, A., A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker, in Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, 2001, vol. 1, pp. 296 -299 vol. 1.
2001
A. Gerosa, Neviani, A., Xotta, A., and Mian, G. A., A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization, in Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, 2001, vol. 2, pp. 1099 -1102 vol.2.
2015
A. Celin and Gerosa, A., Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs, in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 1454-1457.
2018
A. Franceschin, Padovan, F., Nonis, R., and Bevilacqua, A., On the Optimal Operation Frequency to Minimize Phase Noise in Integrated Harmonic Oscillators, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 5, pp. 657 - 661, 2018.
2012
A. Bevilacqua and Andreani, P., Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 59, pp. 20 -24, 2012.
2015
A. Mazzanti and Bevilacqua, A., On the Phase Noise Performance of Transformer-Based CMOS Differential-Pair Harmonic Oscillators, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 2334-2341, 2015.

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