You are here

Biblio

Export 185 results:

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

F

A. Bevilacqua, “Fundamentals of Integrated Transformers: From Principles to Applications”, IEEE Solid-State Circuits Magazine, vol. 12, pp. 86-100, 2020.

A. Gerosa, Neviani, A., and Maniero, A., “A Fully-Integrated Two-Channel A/D Interface for the Acquisition of Cardiac Signals in Implantable Pacemakers”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 39, pp. 1083–1093, 2004.

A. Gerosa, Maniero, A., and Neviani, A., “A Fully-Integrated Two-Channel A/D Interface for the Acquisition of Cardiac Signals in Implantable Pacemakers”, in ESSCIRC, 2003, vol. 1, pp. 157–160.

A. Gerosa, Maniero, A., and Neviani, A., “A Fully-Integrated Dual-Channel Log-Domain Programmable Preamplifier and Filter for an Implantable Cardiac Pacemakers”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS, vol. 51, pp. 1916–1925, 2004.

A. Bevilacqua, Sandner, C., Gerosa, A., and Neviani, A., “A fully integrated differential CMOS LNA for 3-5-GHz ultrawideband wireless receivers”, IEEE Microwave and Wireless Components Letters, vol. 16, pp. 134 -136, 2006.

A. Gerosa, Bernardini, R., and Pietri, S., “A Fully Integrated Chaotic System for the Generation of Truly Random Numbers”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. FUNDAMENTAL THEORY AND APPLICATIONS, vol. 49, pp. 993–1000, 2002.

A. Gerosa, Bernardini, R., and Pietri, S., “A fully integrated 8-bit, 20 MHz, truly random numbers generator, based on a chaotic system”, in Mixed-Signal Design, 2001. SSMSD. 2001 Southwest Symposium on, 2001, pp. 87 -92.

S. Veni, Caruso, M., Seebacher, D., Neviani, A., and Bevilacqua, A., “A Fully Integrated 28 GHz Class-J Doherty Power Amplifier in 130 nm BiCMOS”, in SMACD / PRIME 2021; International Conference on SMACD and 16th Conference on PRIME, 2021.

A. Gerosa, Xotta, A., Neviani, A., and Mian, G. A., “Frequency Offset Compensation in Fractionally Spaced Equalization”, IEE PROCEEDINGS. CIRCUITS, DEVICES AND SYSTEMS, vol. 150, pp. 134–140, 2003.

S. M. Dartizio, Buccoleri, F., Tesolin, F., Avallone, L., Santiccioli, A., Iesurum, A., Steffan, G., Cherniak, D., Bertulessi, L., Bevilacqua, A., Samori, C., Lacaita, A. L., and Levantino, S., “A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μ s-Locking-Time”, IEEE Journal of Solid-State Circuits, pp. 1-14, 2022.

E

A. Gerosa and Mian, G. A., “An Equalizer for Hard Disk Drive Channels, with Low Sensitivity to Sampling Phase Variation”, in EUSIPCO-98, 1998, vol. 1, pp. 483–486.

A. Gerosa and Neviani, A., “Enhancing Output Voltage Swing in Low-Voltage Micro-Power OTA Using Self-Cascode”, ELECTRONICS LETTERS, vol. 39, pp. 638–639, 2003.

A. Bevilacqua and Neviani, A., “Energy-efficient ultra-wideband impulse radios for short-range low-data rate communications”, in 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2014, pp. 874-877.

A. Gerosa, Costa, M. D., Bevilacqua, A., Vogrig, D., and Neviani, A., “An energy-detector for non-coherent impulse-radio UWB receivers”, in IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008, 2008, pp. 2705 -2708.

A. Gerosa, Soldà, S., Bevilacqua, A., Vogrig, D., and Neviani, A., “An Energy-Detector for Noncoherent Impulse-Radio UWB Receivers”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 56, pp. 1030 -1040, 2009.

A. Gerosa, Elettronica Digitale, Esercizi risolti. PADOVA: Edizioni Libreria Progetto, 2006, pp. 1–216.

A. Gerosa, Elettronica Digitale, Esercizi Risolti. PADOVA – ITA: Libreria Progetto, 2004, pp. 1–161.

D. Pecile, Kokorovic, S., Gambarucci, A., and Bevilacqua, A., “On the Efficiency of Output-Matched Radiofrequency Power Amplifiers”, in 2024 19th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2024.

E. Baiesi Fietta, Seebacher, D., Ponton, D., and Bevilacqua, A., “On the Efficiency Enhancement of Voltage Mode Digital Doherty Power Amplifiers”, in 2024 IEEE Nordic Circuits and Systems Conference (NorCAS), 2024.

D

A. Bevilacqua and Mazzanti, A., “Doubly-Tuned Transformer Networks: A Tutorial”, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, pp. 550-555, 2021.

A. Gerosa, Soldà, S., Bevilacqua, A., Vogrig, D., and Neviani, A., “A digitally programmable ring oscillator in the UWB range”, in Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS),, 2010, pp. 1101 -1104.

A. Graell i Amat, Benedetto, S., Montorsi, G., Vogrig, D., Neviani, A., and Gerosa, A., “Design, Simulation, and Testing of a CMOS Analog Decoder for the Block Length-40 UMTS Turbo Code”, Communications, IEEE Transactions on, vol. 54, pp. 1973 -1982, 2006.

A. Gerosa, “Design of Power-Optimized OTAs for SC Applications”. 2001.

F. Padovan, Tiebout, M., Mertens, K. L. R., Bevilacqua, A., and Neviani, A., “Design of Low-Noise K -Band SiGe Bipolar VCOs: Theory and Implementation”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 607-615, 2015.

A. Bevilacqua, Camponeschi, M., Tiebout, M., Gerosa, A., and Neviani, A., “Design of broadband inductorless LNAs in ultra-scaled CMOS technologies”, in IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008. , 2008, pp. 1300 -1303.

Pages