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A. Gerosa and Neviani, A., A LOW-POWER DECIMATION FILTER FOR A SIGMA-DELTA CONVERTER BASED ON A POWER-OPTMIZED SINC FILTER, in ISCAS, 2004, vol. 2, pp. 245–248.
A. Gerosa, Novo, A., and Neviani, A., Low-power sensing and digitization of cardiac signals based on sigma-delta conversion, in Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on, 2000, pp. 216 - 218.
S. Soldà, Caruso, M., Vogrig, D., Bevilacqua, A., Gerosa, A., and Neviani, A., Low-power UWB transmitter using a combined mixer and power amplifier, in Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on, 2010, pp. 333 -336.
A. Maniero, Bevilacqua, A., Gerosa, A., and Neviani, A., A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency, in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06. , 2006, pp. 90 -93.
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G. M. Cortelazzo, Malavasi, E., Gerosa, A., and Neviani, A., A New Structure for Video-Rate 2D SC FIR Filters, in EUSIPCO-96, 1996, vol. 2, pp. 1307–1310.
A. Gerosa, Neviani, A., Xotta, A., and Mian, G. A., A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization, in Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, 2001, vol. 2, pp. 1099 -1102 vol.2.
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A. Bevilacqua, Sandner, C., Gerosa, A., and Neviani, A., Quadrature VCOs Based on Coupled PLLs, in IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007, 2007, pp. 2140 -2143.
R
A. Gerosa, A ready-to-use design procedure for operational transconductance amplifiers that minimizes power consumption, in Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, 2001, vol. 2, pp. 949 -952 vol.2.
A. Celin and Gerosa, A., A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior, in 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, pp. 702-705.

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