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A. Gerosa, Neviani, A., and Zanoni, E., “A SC Video Filter with Analog-RAM-based Delay Efficient Realization”, in ECCTD, 1999, vol. 2, pp. 1247–1250.

L. Tomasin, Vogrig, D., Neviani, A., and Bevilacqua, A., “A Reactive Passive Mixer for 16-QAM Cartesian IoT Transmitters in 22 nm FD-SOI CMOS”, in 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2023.

A. Bevilacqua, Sandner, C., Gerosa, A., and Neviani, A., “Quadrature VCOs Based on Coupled PLLs”, in IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007, 2007, pp. 2140 -2143.

A. Xotta, Gerosa, A., and Neviani, A., “A Programmable-Order Sigma-Delta Converter for a Multi-Standard Wireless Receiver”, in WowCas, Vancouver B.C., Canada, 2004, vol. 1, pp. 33–34.

A. Novo, Gerosa, A., Neviani, A., Zanoni, E., and Mozzi, A., “Programmable voltage multipliers for pacemaker output pulse generation in CMOS 0.8 um technology”, in Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European, 1999, pp. 386 - 389.

A. Novo, Gerosa, A., Neviani, A., Zanoni, E., and Mozzi, A., “Programmable voltage multipliers for pacemaker output pulse generation in CMOS 0.8 um technology”, in Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European, 1999, pp. 386 - 389.

A. Maniero, Gerosa, A., and Neviani, A., “Performance Optimization in Micro-Power, Low-Voltage, Log-Domain Filters in Pure CMOS Technology”, in ISCAS, 2003, vol. 1, pp. 565–568.

A. Gerosa, Neviani, A., and Cortelazzo, G. M., “A partial accumulation analog-RAM-based architecture for delay efficient realization of 2D SC FIR filters”, in Mixed-Signal Design, 1999. SSMSD '99. 1999 Southwest Symposium on, 1999, pp. 195 -198.

A. Gerosa, Bevilacqua, A., Neviani, A., and Xotta, A., “An optimal architecture for a multimode ADC, based on the cascade of a Sigma-Delta modulator and a flash converter”, in Proceedings of 2006 IEEE International Symposium on Circuits and Systems, 2006, p. 4 pp.

A. Gerosa, Neviani, A., Xotta, A., and Mian, G. A., “A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization”, in Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, 2001, vol. 2, pp. 1099 -1102 vol.2.

G. M. Cortelazzo, Malavasi, E., Gerosa, A., and Neviani, A., “A New Structure for Video-Rate 2D SC FIR Filters”, in EUSIPCO-96, 1996, vol. 2, pp. 1307–1310.

A. Xotta, Gerosa, A., and Neviani, A., “A Multi-Mode Sigma-Delta Analog-to-Digital Converter for GSM, UMTS and WLAN”, in ISCAS, 2005.

A. Gerosa, Novo, A., Mengalli, A., and Neviani, A., “A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker”, in Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, 2001, vol. 1, pp. 296 -299 vol. 1.

A. Gerosa, Novo, A., Mengalli, A., and Neviani, A., “A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemaker”, in Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on, 2001, vol. 1, pp. 296 -299 vol. 1.

A. Maniero, Bevilacqua, A., Gerosa, A., and Neviani, A., “A low-voltage III-order log-domain filter in standard CMOS technology with tunable frequency”, in 13th IEEE International Conference on Electronics, Circuits and Systems, 2006. ICECS '06. , 2006, pp. 90 -93.

S. Soldà, Caruso, M., Vogrig, D., Bevilacqua, A., Gerosa, A., and Neviani, A., “Low-power UWB transmitter using a combined mixer and power amplifier”, in Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on, 2010, pp. 333 -336.

A. Neviani, Bevilacqua, A., Gerosa, A., and Vogrig, D., “Low-power ultra-Wide-Band Impulse Radio transceivers for short range communications”, in 2012 IEEE International Conference on IC Design Technology (ICICDT), 2012, pp. 1 -4.

A. Gerosa, Novo, A., and Neviani, A., “Low-power sensing and digitization of cardiac signals based on sigma-delta conversion”, in Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on, 2000, pp. 216 - 218.

A. Gerosa, Novo, A., and Neviani, A., “Low-power sensing and digitization of cardiac signals based on sigma-delta conversion”, in Low Power Electronics and Design, 2000. ISLPED '00. Proceedings of the 2000 International Symposium on, 2000, pp. 216 - 218.

A. Gerosa and Neviani, A., “A LOW-POWER DECIMATION FILTER FOR A SIGMA-DELTA CONVERTER BASED ON A POWER-OPTMIZED SINC FILTER”, in ISCAS, 2004, vol. 2, pp. 245–248.

F. Padovan, Tiebout, M., Mertens, K., Bevilacqua, A., and Neviani, A., “A K-band SiGe bipolar VCO with transformer-coupled varactor for backhaul links”, in 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF),, 2013, pp. 108-110.

A. Graell i Amat, Vogrig, D., Benedetto, S., Montorsi, G., SOLDA, S., Neviani, A., and Gerosa, A., “Iterative Analog Decoder for a SCCC”, in Analog Decoding Workshop, 2006.

M. Bassi, Bevilacqua, A., Gerosa, A., and Neviani, A., “Integrated Transceivers for UWB Breast Cancer Imaging: Architecture and Circuit Constraints”, in 2011 IEEE International Symposium on Circuits and Systems, 2011, pp. 2087-2090.

A. Gerosa, Maniero, A., and Neviani, A., “A Fully-Integrated Two-Channel A/D Interface for the Acquisition of Cardiac Signals in Implantable Pacemakers”, in ESSCIRC, 2003, vol. 1, pp. 157–160.

S. Veni, Caruso, M., Seebacher, D., Neviani, A., and Bevilacqua, A., “A Fully Integrated 28 GHz Class-J Doherty Power Amplifier in 130 nm BiCMOS”, in SMACD / PRIME 2021; International Conference on SMACD and 16th Conference on PRIME, 2021.

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