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[ Author(Desc)] Title Type Year
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C
M. Caruso, Bassi, M., Bevilacqua, A., and Neviani, A., A 2-16 GHz 65 nm CMOS Stepped-Frequency Radar Transmitter With Harmonic Rejection for High-Resolution Medical Imaging Applications, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, pp. 413-422, 2015.
M. Caruso, Bevilacqua, A., and Neviani, A., An X-Band Lumped-Element Wilkinson Combiner With Embedded Impedance Transformation, IEEE Microwave and Wireless Components Letters, vol. 24, pp. 689-691, 2014.
A. Celin and Gerosa, A., A reduced hardware complexity data-weighted averaging algorithm with no tonal behavior, in 2016 IEEE International Symposium on Circuits and Systems (ISCAS), 2016, pp. 702-705.
A. Celin and Gerosa, A., Optimal DWA design in scaled CMOS technologies for mismatch cancellation in multibit ΣΔ ADCs, in 2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 1454-1457.
F. Chiocchetta, De Santi, C., Rampazzo, F., Mukherjee, K., Grünenpütt, J., Sommer, D., Blanck, H., Lambert, B., Gerosa, A., MENEGHESSO, G., Zanoni, E., and Meneghini, M., GaN RF HEMT Reliability: Impact of Device Processing on I-V Curve Stability and Current Collapse, in 2022 IEEE International Reliability Physics Symposium (IRPS), 2022.
G. M. Cortelazzo, Malavasi, E., Gerosa, A., and Neviani, A., A New Structure for Video-Rate 2D SC FIR Filters, in EUSIPCO-96, 1996, vol. 2, pp. 1307–1310.
D
S. Dal Toso, Bevilacqua, A., Tiebout, M., Marsili, S., Sandner, C., Gerosa, A., and Neviani, A., UWB Fast-Hopping Frequency Generation Based on Sub-Harmonic Injection Locking, IEEE Journal of Solid-State Circuits, vol. 43, pp. 2844 -2852, 2008.
S. Dal Toso, Bevilacqua, A., Tiebout, M., Da Dalt, N., Gerosa, A., and Neviani, A., A 0.06 mm2 11 mW Local Oscillator for the GSM Standard in 65 nm CMOS, IEEE Journal of Solid-State Circuits, vol. 45, pp. 1295 -1304, 2010.
S. Dal Toso, Bevilacqua, A., Tiebout, M., Da Dalt, N., Gerosa, A., and Neviani, A., A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOS, in Proceedings of ESSCIRC 2009, 2009, pp. 444 -447.
S. Dal Toso, Bevilacqua, A., Gerosa, A., and Neviani, A., A thorough analysis of the tank quality factor in LC oscillators with switched capacitor banks, in Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS), 2010, pp. 1903 -1906.
S. Dal Toso, Bevilacqua, A., Tiebout, M., Da Dalt, N., Gerosa, A., and Neviani, A., An Integrated Divide-by-Two Direct Injection-Locking Frequency Divider for Bands S Through Ku, IEEE Transactions on Microwave Theory and Techniques, vol. 58, pp. 1686 -1695, 2010.
S. M. Dartizio, Buccoleri, F., Tesolin, F., Avallone, L., Santiccioli, A., Iesurum, A., Steffan, G., Cherniak, D., Bertulessi, L., Bevilacqua, A., Samori, C., Lacaita, A. L., and Levantino, S., A Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching Achieving 68.6 fs-rms-Total-Integrated-Jitter and 1.56 μ s-Locking-Time, IEEE Journal of Solid-State Circuits, pp. 1-14, 2022.
S. Mattia Dartizio, Buccoleri, F., Tesolin, F., Avallone, L., Santiccioli, A., Iesurum, A., Steffan, G., Cherniak, D., Bertulessi, L., Bevilacqua, A., Samori, C., Lacaita, A. Leonardo, and Levantino, S., A 68.6fs_rms-Total-integrated-Jitter and 1.5μs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching, in 2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022.
G
A. Gatti, Spiazzi, G., Gerosa, A., Neviani, A., and Bevilacqua, A., A 130-nm CMOS Dual Input-Polarity DC–DC Converter for Low-Power Applications, IEEE Solid-State Circuits Letters, vol. 2, pp. 211-214, 2019.
A. Gerosa, Design of Power-Optimized OTAs for SC Applications. 2001.
A. Gerosa, Xotta, A., Bevilacqua, A., and Neviani, A., An A/D Converter for Multimode Wireless Receivers, Based on the Cascade of a Double-Sampling Σ Δ Modulator and a Flash Converter, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 53, pp. 2109 -2124, 2006.
A. Gerosa and Neviani, A., Enhancing Output Voltage Swing in Low-Voltage Micro-Power OTA Using Self-Cascode, ELECTRONICS LETTERS, vol. 39, pp. 638–639, 2003.
A. Gerosa, Soldà, S., Bevilacqua, A., Vogrig, D., and Neviani, A., A digitally programmable ring oscillator in the UWB range, in Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS),, 2010, pp. 1101 -1104.
A. Gerosa, Neviani, A., Xotta, A., and Mian, G. A., A novel architecture to reduce complexity in hard disk read channel based on fractionally spaced equalization, in Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on, 2001, vol. 2, pp. 1099 -1102 vol.2.
A. Gerosa, Cortelazzo, G. M., Baschirotto, A., and Malavasi, E., 2D video rate SC FIR filters based on analog RAMs, Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 46, pp. 1348 -1360, 1999.

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