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B

A. Bevilacqua, Maniero, A., Gerosa, A., and Neviani, A., “An Integrated Solution for Suppressing WLAN Signals in UWB Receivers”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 54, pp. 1617 -1625, 2007.

A. Bevilacqua, Pavan, F. P., Sandner, C., Gerosa, A., and Neviani, A., “A 3.4-7 GHz Transformer-Based Dual-mode Wideband VCO”, in Proceedings of the 32nd European Solid-State Circuits Conference, 2006, pp. 440 -443.

A. Bevilacqua and Niknejad, A. M., “An Ultrawideband CMOS Low-Noise Amplifier for 3.1–10.6-GHz Wireless Receivers”, IEEE Journal of Solid-State Circuits, vol. 39, pp. 2259–2268, 2004.

A. Bevilacqua and Andreani, P., “A 2.7-6.1GHz CMOS local oscillator based on frequency multiplication by 3/2”, in NORCHIP, 2011, 2011, pp. 1 -4.

A. Bevilacqua, Sandner, C., Gerosa, A., and Neviani, A., “Quadrature VCOs Based on Coupled PLLs”, in IEEE International Symposium on Circuits and Systems, 2007. ISCAS 2007, 2007, pp. 2140 -2143.

A. Bevilacqua and Svelto, F., “Non-linear spectral analysis of direct conversion wireless receivers”, in IEEE 2002 Radio and Wireless Conference, 2002, pp. 39 - 42.

A. Bevilacqua and Neviani, A., “Energy-efficient ultra-wideband impulse radios for short-range low-data rate communications”, in 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2014, pp. 874-877.

A. Bevilacqua and Andreani, P., “Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator”, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 59, pp. 20 -24, 2012.

A. Bevilacqua and Mazzanti, A., “Analysis of CMRR in Doubly-Tuned Transformer Baluns”, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 71, pp. 4874-4878, 2024.

A. Bevilacqua, Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., “A 6-9-GHz programmable gain LNA with integrated balun in 90-nm CMOS”, in IEEE International Conference on Ultra-Wideband, 2008. ICUWB 2008. , 2008, vol. 1, pp. 25 -28.

A. Bevilacqua and Andreani, P., “An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators”, Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 59, pp. 938 -945, 2012.

A. Bevilacqua and Niknejad, A. M., “An ultra-wideband CMOS LNA for 3.1 to 10.6 GHz wireless receivers”, in Digest of Technical Papers of 2004 IEEE International Solid-State Circuits Conference, 2004, pp. 382 - 533 Vol.1.

A. Bilato, Issakov, V., and Bevilacqua, A., “A 114-126 GHz Frequency Quintupler with >36 dBc Harmonic Rejection in 0.13 μm SiGe BiCMOS”, in 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2019.

A. Bilato, Issakov, V., and Bevilacqua, A., “Considerations on 120GHz LO Signal Generation and Distribution for Highly-Integrated Multi-Channel Radar Transceivers”, in 2019 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS), 2019.

A. Bilato, Issakov, V., Mazzanti, A., and Bevilacqua, A., “A Multichannel D-Band Radar Receiver With Optimized LO Distribution”, IEEE Solid-State Circuits Letters, vol. 4, pp. 141-144, 2021.

J. Borremans, Bevilacqua, A., Bronckers, S., Dehan, M., Kuijk, M., Wambacq, P., and Craninckx, J., “A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS”, IEEE Journal of Solid-State Circuits, vol. 43, pp. 2693 -2705, 2008.

F. Boscolo, Padovan, F., Quadrelli, F., Tiebout, M., Neviani, A., and Bevilacqua, A., “A 21GHz 20.5%-tuning range Colpitts VCO with -119 dBc/Hz phase noise at 1MHz offset”, in ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference, 2017, pp. 91-94.

S. Brenna, Padovan, F., Neviani, A., Bevilacqua, A., Bonfanti, A., and Lacaita, A. L., “A 64-Channel 965-uW Neural Recording SoC With UWB Wireless Transmission in 130-nm CMOS”, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 63, pp. 528-532, 2016.

F. Buccoleri, Dartizio, S. M., Tesolin, F., Avallone, L., Santiccioli, A., Lesurum, A., Steffan, G., Bevilacqua, A., Bertulessi, L., Cherniak, D., Samori, C., Lacaita, A. L., and Levantino, S., “A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler”, in 2022 IEEE Custom Integrated Circuits Conference (CICC), 2022.

F. Buccoleri, Dartizio, S. M., Tesolin, F., Avallone, L., Santiccioli, A., Iesurum, A., Steffan, G., Cherniak, D., Bertulessi, L., Bevilacqua, A., Samori, C., Lacaita, A. L., and Levantino, S., “A 72-fs-Total-Integrated-Jitter Two-Core Fractional-N Digital PLL With Digital Period Averaging Calibration on Frequency Quadrupler and True-in-Phase Combiner”, IEEE Journal of Solid-State Circuits, vol. 58, pp. 634-646, 2023.

C

M. Camponeschi, Bevilacqua, A., Tiebout, M., and Neviani, A., “A X-Band I/Q Upconverter in 65 nm CMOS for High Resolution FMCW Radars”, IEEE Microwave and Wireless Components Letters, vol. 22, pp. 141 -143, 2012.

M. Camponeschi, Bevilacqua, A., Neviani, A., and Andreani, P., “Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end”, in Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS), 2010, pp. 2063 -2066.

M. Camponeschi, Bevilacqua, A., and Andreani, P., “Analysis and design of a low-power single-stage CMOS wireless receiver”, in Proc. of 2009 NORCHIP, 2009, pp. 1 -4.

M. Camponeschi, Bevilacqua, A., and Andreani, P., “Time-variant analysis and design of a power efficient ISM-band quadrature receiver”, Analog Integrated Circuits and Signal Processing, vol. 67, pp. 11-20, 2011.

A. D. Capobianco, Khan, M. S., Caruso, M., and Bevilacqua, A., “3-18 GHz compact planar antenna for short-range radar imaging”, Electronics Letters, vol. 50, pp. 1016-1018, 2014.

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