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M. Camponeschi, Bevilacqua, A., Neviani, A., and Andreani, P., Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end, in Proceedings of 2010 IEEE International Symposium on Circuits and Systems (ISCAS), 2010, pp. 2063 -2066.
A. Gerosa, Xotta, A., Bevilacqua, A., and Neviani, A., An A/D Converter for Multimode Wireless Receivers, Based on the Cascade of a Double-Sampling Σ Δ Modulator and a Flash Converter, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 53, pp. 2109 -2124, 2006.
S. Soldà, Vogrig, D., Bevilacqua, A., Gerosa, A., and Neviani, A., Analog decoding of trellis coded modulation for multi-level flash memories, in IEEE International Symposium on Circuits and Systems, 2008. ISCAS 2008., 2008, pp. 744 -747.
A. Vallese, Bevilacqua, A., Sandner, C., Tiebout, M., Gerosa, A., and Neviani, A., An analog front-end with integrated notch filter for 3-5 GHz UWB receivers in 0.13 um CMOS, in Proc. of IEEE 2007 European Solid State Circuits Conference, 2007, pp. 139 -142.
A. Passamani, Ponton, D., Knoblinger, G., and Bevilacqua, A., Analysis and design of a 1.1dB-IL third-order Matching Network for Switched-Capacitor PAs, in Nordic Circuits and Systems Conference (NORCAS): NORCHIP International Symposium on System-on-Chip (SoC), 2015, 2015, pp. 1-4.
S. Veni, Andreani, P., Caruso, M., Tiebout, M., and Bevilacqua, A., Analysis and Design of a 17-GHz All-npn Push-Pull Class-C VCO, IEEE Journal of Solid-State Circuits, vol. 55, pp. 2345-2355, 2020.
M. Camponeschi, Bevilacqua, A., and Andreani, P., Analysis and design of a low-power single-stage CMOS wireless receiver, in Proc. of 2009 NORCHIP, 2009, pp. 1 -4.

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