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Integrated Circuits for Analog and RF µ-Systems
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Zanoni, E.
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1999
A. Gerosa
,
Neviani, A.
, and
Zanoni, E.
,
“
A SC Video Filter with Analog-RAM-based Delay Efficient Realization
”
, in
ECCTD
, 1999, vol. 2, pp. 1247–1250.
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Recent Publications
A 68.6fs_rms-Total-integrated-Jitter and 1.5μs-LocKing-Time Fractional-N Bang-Bang PLL Based on Type-II Gear Shifting and Adaptive Frequency Switching
A Broadband 22-31-GHz Bidirectional Image-Reject Up/Down Converter Module in 28-nm CMOS for 5G Communications
A 9GHz 72fs-Total-lntegrated-Jitter Fractional-N Digital PLL with Calibrated Frequency Quadrupler
A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise
A 22–31 GHz Bidirectional 5G Transceiver Front-End in 28 nm CMOS
More...